UTBOX FDSOI CMOS Transition Cells for Well Continuity
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Solution Overview
Problem
UTBOX FDSOI integrated circuits face design and reliability issues due to abrupt discontinuities between n-doped and p-doped wells in co-integrated regular and flipped standard cells, leading to singularity points that disrupt design rule checking and mask design, affecting the fabrication process.
Innovation Solution
The integration of transition cells with semiconductor wells of matching doping types between regular and flipped standard cells ensures electrical continuity, aligning pMOS transistors in rows with transition cells placed between contiguous cells to maintain continuity with either n-doped or p-doped wells, and using a deep semiconductor well for electrical biasing, allowing for multiple threshold voltage ranges and improved design reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If co-integrated regular and flipped standard cells are used to obtain multiple threshold voltages, then transistor threshold voltage ranges are diversified, but abrupt discontinuities between n-doped and p-doped wells create singularity points that disrupt design rule checking and mask design
Solution Approach 1:
The patent introduces transition cells as intermediary elements between regular and flipped standard cells. These transition cells contain semiconductor wells with doping types that match their adjacent cells, acting as mediators to bridge the doping type mismatch. This intermediary structure eliminates abrupt discontinuities and singularity points while maintaining the ability to provide multiple threshold voltage ranges through the co-integrated regular and flipped cells.
Solution Approach 2:
The patent applies local quality by making the doping type of semiconductor wells in transition cells match the local requirements of adjacent cells. Instead of using a uniform doping structure throughout, the doping type is locally adapted: transition cells adjacent to n-doped wells have n-doped wells, and those adjacent to p-doped wells have p-doped wells. This local adaptation eliminates discontinuities while preserving the overall functionality of multiple threshold voltage ranges.
2Reliability
If transition cells are inserted between regular and flipped standard cells to ensure electrical continuity, then design rule compliance is improved, but device complexity increases
Solution Approach 1:
The transition cells are designed to be universal in their functionality, serving multiple purposes: they maintain electrical continuity, match doping types with adjacent cells, and can be integrated into the standard cell library. By making transition cells multi-functional and reusable throughout the circuit design, the patent reduces the overall complexity impact despite the additional cell type, as the same transition cell design can be repeatedly applied at all interfaces between regular and flipped cells.
3Productivity
If multiple threshold voltage transistors are integrated on the same circuit, then circuit performance and power consumption are optimized, but abrupt doping discontinuities affect fabrication process reliability
Solution Approach 1:
The transition cells act as intermediary structures that eliminate abrupt doping discontinuities between n-doped and p-doped wells. By introducing these intermediate cells with matching doping types, the patent creates gradual transitions in the doping landscape, which improves fabrication process reliability while maintaining the ability to integrate multiple threshold voltage transistors for optimized circuit performance and power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance and reliability of UTBOX FDSOI integrated circuits by eliminating singularity points, ensuring design rule compliance, and facilitating adequate electrical biasing, thus improving the fabrication process and circuit performance.
Implementation Method 1
a first semiconductor well having a n-type doping, lying beneath the first semiconductor ground plane and able to apply an electrical potential to said first semiconductor ground plane
Data Source
AI summary
An IC has cells placed in a cell row having a UTBOX-FDSOI pMOSFET including a ground beneath the pMOS, and an n-doped well beneath it and configured to apply a potential thereto, and a UTBOX-FDSOI nMOSFET including a ground beneath the nMOS, and a p-doped well beneath the ground and configured to apply a potential thereto, and cells, each including a UTBOX-FDSOI pMOSFET including a ground beneath the pMOS, and a p-doped well beneath the ground and configured to apply an electrical potential to the ground, and a UTBOX-FDSOI nMOSFET including a ground beneath the nMOS, and an n-doped well beneath the ground and configured to apply a potential thereto. The cells are placed so that pMOS's of standard cells belonging to a row align along it and a transition cell including a another well and contiguous with first row standard cells thus ensuring continuity with wells of those cells.


