Traffic Predictor for UVM Register Abstraction Layer Verification
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Solution Overview
Problem
The complexity of modern integrated circuits (ICs) with multiple communication interfaces makes it difficult to verify correct stimulus and response signals, particularly due to the challenge of decoding signal timing waveforms, leading to time-consuming and labor-intensive functional verification processes.
Innovation Solution
A system comprising a control station with a graphical user interface and an emulator that includes a verification component and a register abstraction layer to generate and verify stimulus signals across communication interfaces, using a traffic predictor to monitor and predict responses, thereby determining if the DUT's responses match expected outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If manual verification of communication interfaces is used, then verification accuracy can be maintained, but verification time and complexity increase significantly
Solution Approach 1:
The patent introduces a traffic predictor as an intermediary component that automatically predicts expected traffic patterns and compares them with actual DUT responses. This mediator handles the complex verification tasks, allowing manual verifiers to focus on high-level validation while the automated system manages detailed signal decoding and comparison, thus reducing verification time without sacrificing accuracy.
Solution Approach 2:
The patent creates a virtual model (traffic predictor) that replicates the expected behavior of the communication interface. Instead of manually analyzing each signal waveform, the system uses this copied behavioral model to automatically predict and verify traffic patterns, significantly reducing verification time while maintaining accuracy through systematic comparison of predicted versus actual responses.
2Reliability
If detailed signal waveform decoding is performed manually, then verification thoroughness is improved, but operational complexity increases
Solution Approach 1:
The traffic predictor performs self-service by automatically decoding signal waveforms, predicting expected responses, and identifying discrepancies without requiring manual intervention for each detailed analysis step. The system serves itself by maintaining an internal model of expected behavior and autonomously comparing actual signals against this model, thereby ensuring thorough verification while simplifying operator involvement to oversight and result validation.
3Productivity
If multiple communication interfaces are verified simultaneously, then productivity is improved, but device complexity increases
Solution Approach 1:
The patent implements a universal traffic predictor that can handle multiple different communication interface protocols simultaneously through a single integrated system. The traffic predictor is designed with multi-functional capabilities to predict and verify various protocol types (Ethernet, USB, PCIe, etc.) using a common architectural framework, thereby improving productivity through parallel verification while managing complexity through protocol-agnostic design patterns and standardized verification methods.
Data Source
AI summary
A system for verifying functionality of a circuit design under test (DUT) includes a control station comprising at least one graphical user interface (GUI); and at least one emulator in communication with the control station. The emulator may include a verification component and a register abstraction layer (RAL), wherein the verification component is configured to implement the DUT and the RAL is configured to implement one or more communication interfaces of the DUT. A traffic predictor in communication with the at least one emulator may monitor data traffic over the communication interface between the at least one emulator and the DUT, predict a response to the data traffic by the DUT, monitor a response to the traffic by the DUT, and determine if the response by the DUT matches the predicted response.