UWB Wake-Up Timing Using PLL Clock Delay Compensation

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Solution Overview

Problem

Existing ultra-wideband (UWB) wireless communication systems face challenges in efficiently managing power consumption, particularly in deep sleep modes, which affects the accuracy of wake-up timing and overall system efficiency.

Innovation Solution

The implementation of a method that includes a PLL clock counter to track the number of PLL clock cycles between the sleep signal activation and the DC-DC converter shutdown, allowing for precise calculation of the wake-up delay and reducing power consumption by optimizing sleep mode durations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the DC-DC converter is turned off during deep sleep mode to reduce power consumption, then energy efficiency is improved, but wake-up timing accuracy deteriorates due to unaccounted delay periods

Engineering Contradiction:
Improvepower consumptionVSAvoidwake-up timing accuracy
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by counting the number of PLL clock cycles that occur between the sleep signal assertion and the DC-DC converter shutdown. This pre-measured delay value is stored and later subtracted from the total sleep duration to calculate the accurate wake-up time, thereby compensating for the converter shutdown delay and maintaining wake-up timing accuracy while enabling deep sleep mode for power savings

Inventive Principle:
Principle #10Preliminary action

2Duration of action of moving object

If sleep mode durations are extended to improve battery life, then energy efficiency is improved, but wake-up timing errors accumulate due to unaccounted delays

Engineering Contradiction:
Improvebattery lifeVSAvoidwake-up timing error
Core Design Contradiction:
Duration of action of moving objectVSLoss of time

Solution Approach 1:

The patent implements feedback by measuring the actual delay caused by DC-DC converter shutdown through PLL clock cycle counting, storing this measured value, and using it to adjust subsequent wake-up timing calculations. This feedback mechanism ensures that even during extended sleep periods, the wake-up time remains accurate by continuously compensating for the known converter shutdown delay

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250149136A1Ultra wideband (UWB) transmitter and receiver circuits
Publication Date: 2025.05.08 SPARK MICROSYSTEM INTERNATIONAL INC
  • US20250149136A1 patent drawing
  • US20250149136A1 patent drawing
  • US20250149136A1 patent drawing

AI summary

Ultra-Wideband (UWB) wireless technology transmits digital data as modulated coded impulses over a very wide frequency spectrum with very low power over a short distance. To support extended operation, particularly with battery power sources, the inventors have established UWB devices which support wake-up from deep sleep modes when these devices exploit low frequency clock sources for ultra-low power consumption. Further, power consumption may be reduced by exploiting transistors or so-called compounded MOSFET structures whose effective gain and output resistance exceeds any single transistor irrespective of length or by employing biasless low power differential (exponential) transconductance stages within operational transconductance amplifiers in order to provide very high gain low power amplification stages. Further, the inventors have established voltage reference sources that consume very low current, a few nA, and ultra-low power low dropout regulators.