V-Shaped Multilevel Gridless Routing for IC Layouts

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Solution Overview

Problem

Existing IC routing algorithms, such as the Λ-shaped framework, fail to efficiently route longer nets due to initial routing choices made for shorter nets, leading to increased path delays and congestion, and do not account for the routing resource requirements of later routed nets, making it difficult to route timing-critical nets effectively.

Innovation Solution

A gridless routing algorithm that iteratively partitions and merges IC tiles, using a congestion map to estimate and minimize the impact on routing resources, prioritizing longer nets and dynamically updating the congestion map to guide route selection, ensuring that routes avoid conflicts and optimize resource usage across the IC layout.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If shorter nets are routed first in the Λ-shaped framework, then the initial routing process can be completed quickly, but longer nets suffer from increased path delays and routing conflicts

Engineering Contradiction:
Improverouting speedVSAvoidsignal path delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by estimating routing resource requirements for all nets before actual routing begins. A congestion map is constructed that predicts future routing needs, allowing the router to anticipate and avoid congestion zones before they become problems. This enables longer nets to be routed with adequate space reserved, preventing the path delay issues that occur when shorter nets are routed first without considering future routing needs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamics by using an iterative V-shaped multilevel routing framework that alternates between uncoarsening and coarsening phases. The router dynamically adjusts routing decisions based on congestion maps updated at each iteration. This dynamic approach allows the system to adapt routing paths as more information becomes available, optimizing both short and long net routes while minimizing signal path delays.

Inventive Principle:
Principle #15Dynamics

2Productivity

If routing choices are made without considering future routing needs, then the routing process can proceed quickly, but routing conflicts increase and resource optimization deteriorates

Engineering Contradiction:
Improverouting efficiencyVSAvoidrouting conflict resolution
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements feedback by constructing and updating congestion maps that reflect routing resource requirements. After each routing decision, the congestion map is updated to account for the used routing resources. This feedback mechanism allows subsequent routing decisions to account for previous choices and anticipate future conflicts, thereby reducing routing conflicts while maintaining efficient routing progress.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies preliminary action by estimating routing resource requirements for all nets before actual routing begins. A congestion map is constructed that predicts future routing needs, allowing the router to anticipate and avoid congestion zones before they become problems. This enables longer nets to be routed with adequate space reserved, preventing the path delay issues that occur when shorter nets are routed first without considering future routing needs.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If a grid-based routing approach is used, then routing follows standardized paths, but flexibility in optimizing specific net routes is reduced

Engineering Contradiction:
Improverouting standardizationVSAvoidroute optimization flexibility
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent applies segmentation by dividing the IC layout into a hierarchical structure of tiles at multiple levels. This segmentation allows the router to work with manageable sections while maintaining global optimization capabilities. The V-shaped multilevel framework processes routing at different granularities, combining the standardization benefits of grid-based approaches with the flexibility of detailed route optimization within each tile segment.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7707536B2V-shaped multilevel full-chip gridless routing
Publication Date: 2010.04.27 SYNOPSYS INC
  • US7707536B2 patent drawing
  • US7707536B2 patent drawing
  • US7707536B2 patent drawing

AI summary

A router organizes an IC area into an array of global routing cells (GRCs) and generates a congestion map providing a separate congestion factor for each GRC boundary. The router then iteratively partitions the IC area into progressively smaller tiles while selecting a route for each net passing between tiles when possible without altering any previously routed net. The router thereafter iteratively merges the tiles into progressively larger tiles while selecting a route for each previously unrouted net residing wholly within a single tile, altering routes of previously routed nets when necessary to accommodate the selected route. When selecting each route for any connection of a net, the router seeks to minimize a cost function of congestion factors of all GRC boundaries.