Valley Tracking Trim Updates for Memory Read Reliability
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Solution Overview
Problem
Memory devices face challenges in maintaining data retention and reliability due to cross-temperature effects, which lead to bit flip errors and reduced read window budget, especially in high-density non-volatile memory devices like QLC NAND, where error correction operations increase latency and reduce throughput.
Innovation Solution
The implementation of enhanced valley tracking with trim setting updates in memory devices, which involves a failed byte count read operation to adjust read voltage levels and other parameters, allowing for real-time calibration and error correction to maintain data integrity across varying temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction operations are performed to address bit flip errors, then data reliability is improved, but latency increases and throughput decreases
Solution Approach 1:
The system performs preliminary valley tracking operations during idle periods or background times to establish baseline read window parameters before actual data read operations occur. This preliminary calibration reduces the need for extensive error correction during critical read operations, thereby maintaining high throughput while ensuring data reliability.
Solution Approach 2:
The system continuously monitors read error rates and uses this feedback to dynamically adjust read window parameters and trim settings. By implementing feedback loops that adapt read parameters based on observed error patterns, the system optimizes the balance between error correction effectiveness and read operation speed, resolving the contradiction between reliability and throughput.
2Reliability
If read voltage levels are adjusted to compensate for cross-temperature effects, then data retention is improved, but operation complexity increases
Solution Approach 1:
The system automatically adjusts read voltage parameters and trim settings based on temperature conditions and operational history. By implementing parameter changes that adapt to environmental conditions, the system maintains data retention without requiring complex manual intervention, thus improving reliability while managing operational complexity through automation.
Solution Approach 2:
The valley tracking mechanism performs self-calibration by automatically detecting and compensating for threshold voltage shifts caused by temperature variations. The system serves itself by using built-in sensing circuits and control logic to adjust read parameters without external intervention, reducing operational complexity while maintaining data retention across temperature ranges.
3Measurement precision
If valley tracking operations are performed frequently to maintain read accuracy, then read window budget is improved, but processing time increases
Solution Approach 1:
The system performs valley tracking operations during background periods or idle times to pre-establish accurate read window parameters. By completing these precision measurements beforehand, the system avoids the time penalty of performing valley tracking during critical data read operations, thus improving read accuracy without increasing processing time for actual data retrieval.
Solution Approach 2:
The system implements partial valley tracking by performing simplified or reduced-duration valley tracking operations that provide sufficient accuracy without the full computational overhead. By using partial action that meets the minimum requirements for read accuracy, the system balances measurement precision with processing time efficiency.
Data Source
AI summary
Control logic in a memory device receives a request to perform a read operation to read data from a memory array of a memory device, the request comprising an indication of a segment of the memory array where the data is stored, and performs a first coarse valley tracking calibration operation on the segment of the memory array. The control logic further configures a read voltage level and one or more parameters associated with the read operation based on a result of the first coarse valley tracking calibration operation and performs a second fine valley tracking calibration operation on the segment of the memory array using the configured read voltage level and the configured one or more parameters.


