Value Prediction Check Circuit for Load Pipeline Speculation

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Solution Overview

Problem

Modern processors face performance penalties due to the time required to resolve speculation in load value operations, which can lead to suspension of processing and execution stalls, especially when incorrect operand values are used, necessitating pipeline flushing or stalling.

Innovation Solution

A digital processor with a load pipeline and a value prediction check circuit that allows for early resolution of speculation by comparing a masked data value to a predicted value, enabling parallel execution of instruction phases and reducing the time needed to resolve speculation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If load value speculation is used to improve processor performance, then processing can proceed before input operands are known, but processing must be suspended and pipeline state flushed if the prediction is incorrect

Engineering Contradiction:
Improveprocessor performanceVSAvoidexecution cycle penalty
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing the value prediction check earlier in the load pipeline, before the load result is fully computed. The check circuit compares the predicted value against the actual load value at an intermediate pipeline stage, enabling early detection of prediction errors and avoiding full pipeline flush when mismatches occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary value prediction check circuit that acts as a mediator between the load pipeline and the execution units. This check circuit validates predicted values at an intermediate stage, allowing correct predictions to proceed without interruption while enabling early abort of incorrect predictions, thus reducing the penalty for speculation errors.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If speculative processing is performed, then instruction throughput is improved, but corrective action requires temporary suspension of processing

Engineering Contradiction:
Improveinstruction throughputVSAvoidtime to resolve speculation
Core Design Contradiction:
ProductivityVSDuration of action of moving object

Solution Approach 1:

The value prediction check is performed preliminarily at an intermediate pipeline stage rather than waiting for the full load operation to complete. This early check reduces the duration needed to resolve speculation by detecting prediction errors before they propagate through the entire pipeline, thereby maintaining high instruction throughput while minimizing correction time.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If pipeline flushing is performed to correct incorrect speculation, then processing accuracy is maintained, but execution time increases due to stalling

Engineering Contradiction:
Improveprocessing accuracyVSAvoidexecution cycle penalty
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the value prediction check from the traditional pipeline flush mechanism and implements it as a separate check circuit that operates independently at an intermediate stage. This extraction allows the system to maintain processing accuracy by validating predicted values early, while avoiding the time penalty of full pipeline flushing for incorrect predictions.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

By performing the validation check preliminarily before the load result is committed, the system maintains processing accuracy through early error detection. When a mismatch is detected, corrective action can be taken immediately without requiring full pipeline flush, thus maintaining reliability while minimizing execution time penalty.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11366668B1Method and apparatus for comparing predicated load value with masked load value
Publication Date: 2022.06.21 ARM LTD
  • US11366668B1 patent drawing
  • US11366668B1 patent drawing
  • US11366668B1 patent drawing

AI summary

A digital processor, method, and a non-transitory computer readable storage medium are described, and include a load pipeline operative to access a data content and convert the data content into a load result. The digital processor also includes a value prediction check circuit that is operative to access a speculative content, determine a predicted value from the speculative content, and determine a masked value by masking the data content with a data mask. The masked value is compared to the predicted value, and an action associated with the load result is commanded based upon the comparing of the masked value and the predicted value.