Variable Impedance Interface Circuit for Integrated Signal Conditioning
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Solution Overview
Problem
Existing memory interface receivers require multiple circuits for noise removal, duty ratio change, and equalization, leading to increased size and reduced integration.
Innovation Solution
An interface circuit with a variable impedance circuit and a code generator that adjusts impedance based on control codes, allowing the same structure to perform multiple operations such as noise removal, duty ratio change, and equalization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple separate circuits are used for noise removal, duty ratio change, and equalization operations, then each operation can be performed with dedicated circuitry, but the receiver size increases and integration degree decreases
Solution Approach 1:
The patent implements a single amplifier circuit that can perform multiple operations (noise removal, duty ratio change, and equalization) by dynamically adjusting its impedance characteristics through control codes. This multi-functional approach eliminates the need for separate dedicated circuits for each operation, thereby reducing receiver size while maintaining all required functionality
Solution Approach 2:
The patent employs a variable impedance circuit that can dynamically change its impedance characteristics based on control codes generated by a code generator circuit. This dynamic adaptability allows the same circuit structure to be reconfigured for different operations (noise removal, duty ratio change, equalization) without requiring static separate circuits, thus reducing overall device complexity
2Reliability
If multiple separate circuits are used for noise removal, duty ratio change, and equalization operations, then each operation can be performed with dedicated circuitry, but the degree of integration decreases
Solution Approach 1:
The single amplifier circuit is designed to universally handle multiple signal processing operations through impedance adjustment. By making the circuit multi-functional, it can be integrated into a compact receiver structure without requiring separate integrated blocks for each operation, thus improving the degree of integration while preserving all operational capabilities
Solution Approach 2:
The patent merges the functions of noise removal, duty ratio change, and equalization circuits into a single integrated amplifier structure. This consolidation combines multiple previously separate functions into one unified circuit, thereby increasing the degree of integration and reducing the overall receiver complexity
3Reliability
If multiple separate circuits are used for noise removal, duty ratio change, and equalization, then each function can be optimized independently, but power consumption increases
Solution Approach 1:
The single amplifier circuit performs multiple functions that would otherwise require separate power-consuming circuits. By making the amplifier multi-functional through impedance control, the patent reduces the total number of active circuits and their associated power consumption, while still providing optimized performance for each operation through controlled impedance adjustments
Solution Approach 2:
The patent optimizes power consumption by dynamically changing the impedance parameters of the amplifier circuit based on the required operation. The code generator circuit selects appropriate impedance configurations to achieve optimal performance for each function (noise removal, duty ratio change, equalization) while minimizing power usage compared to having all circuits operating simultaneously
Data Source
AI summary
An interface circuit includes a first amplifier circuit comprising a first input terminal configured to receive a first input signal, a second input terminal configured to receive a second input signal, a first output node configured to output a first output signal, a second output node configured to output a second output signal, and a variable impedance circuit comprising a first impedance circuit connected to the first output node, and a second impedance circuit connected to the second output node. A code generator circuit is configured to generate a first control code and a second control code. The first impedance circuit is configured to adjust an impedance thereof based on the first control code, and the second impedance circuit is configured to adjust an impedance thereof based on the second control code.


