Variable-Interval ADC for CMOS Image Sensor Power Reduction

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Solution Overview

Problem

CMOS image sensors experience increased power consumption due to extended counting during high luminance conditions, as they use correlated double sampling to process digital data, leading to undesirable power consumption proportional to the luminance of detected optical signals.

Innovation Solution

An analog-to-digital converter (ADC) is designed with a comparator and counter that adjust the counting interval based on a comparison between a decreasing ramp signal and an image signal, determining whether the first counting interval is less than a reference interval to optimize power usage by varying the counting duration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If correlated double sampling is used to process digital data, then measurement precision is improved, but use of energy increases during high luminance conditions

Engineering Contradiction:
Improvesignal processing precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic counting interval adjustment where the ADC selectively applies a first counting interval or a second counting interval based on the detected luminance level. During high luminance conditions, a shorter counting interval is used to reduce power consumption, while maintaining adequate precision. This dynamic adaptation resolves the contradiction by making the counting duration variable rather than fixed, allowing the system to optimize between precision and energy usage based on real-time conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the counting interval parameter according to luminance conditions. The ADC determines whether to use a first counting interval or a second counting interval based on the image signal characteristics. This parameter change allows the system to reduce power consumption during high luminance by shortening the counting interval, while still maintaining sufficient measurement precision for the given conditions.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If counting interval is extended to maintain precision, then measurement precision is improved, but productivity decreases due to increased processing time

Engineering Contradiction:
Improvesignal processing precisionVSAvoidprocessing speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent dynamically adjusts the counting interval based on luminance detection. When high luminance is detected, the system switches to a shorter counting interval, thereby increasing processing speed and productivity. This dynamic adjustment resolves the contradiction by allowing the system to use shorter intervals when precision requirements are naturally satisfied by high signal levels, thus improving throughput without sacrificing necessary precision.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies partial counting action by using different counting intervals appropriate to the signal conditions. During high luminance conditions, a reduced counting interval provides sufficient precision without the full counting duration, effectively applying only the necessary amount of processing action required. This partial action approach maintains adequate precision while improving processing speed and productivity.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8946616B2Analog-to-digital converter using variable counting interval and image sensor including same
Publication Date: 2015.02.03 SAMSUNG ELECTRONICS CO LTD
  • US8946616B2 patent drawing
  • US8946616B2 patent drawing
  • US8946616B2 patent drawing

AI summary

An analog-to-digital converter (ADC) within an image sensor includes a comparator comparing a ramp signal with an image signal, and a counter generating a count result in response to the comparison by counting a clock during a counting interval. The ADC determines whether a first counting interval for the counter is less than a reference interval, and if the first counting interval is less than the reference interval the counting interval is a first counting interval, else the counting interval is a second counting interval.