Variable Load Resistor for ReRAM Cell State Restoration

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Solution Overview

Problem

In crosspoint memory cell arrays, diode breakdown due to voltage pulses can lead to excessively low resistance states, causing short-circuits and preventing proper writing or reading from adjacent memory cells, and existing methods fail to effectively restore the high resistance state of defective cells.

Innovation Solution

A method involving a variable load resistor connected in series with memory cells, where the resistance value is adjusted to apply a second resistance-increasing pulse to shift defective cells from an excessively low resistance state to a higher resistance state, ensuring most voltage is applied to the variable resistance element, thereby preventing excessive current flow and allowing normal operation of adjacent cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a voltage pulse is applied to a memory cell to change the resistance state, then the variable resistance element can be programmed, but dielectric breakdown occurs in the diode causing it to become short-circuited

Engineering Contradiction:
Improveprogramming speedVSAvoiddiode integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A variable load resistor is introduced as an intermediary component connected in series with the memory cell. This load resistor acts as a current limiter that prevents excessive current from damaging the diode during programming operations, while still allowing sufficient current to flow to achieve the desired resistance state change in the variable resistance element.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The load resistor is made variable rather than fixed, allowing its resistance value to be dynamically adjusted based on the programming requirements. This enables optimal current limiting during high-stress programming operations while maintaining proper operation during normal read and write cycles.

Inventive Principle:
Principle #15Dynamics

2Productivity

If the diode becomes short-circuited due to breakdown, then the memory cell enters an excessively low resistance state, but this prevents proper writing or reading from adjacent memory cells

Engineering Contradiction:
Improvememory array utilizationVSAvoidexcessive current spread
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The variable load resistor serves as a protective intermediary that isolates the defective memory cell from the rest of the memory array. By limiting the current that can flow through the short-circuited diode, it prevents excessive current from spreading to adjacent cells, thereby maintaining the functionality of the surrounding memory array.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The variable load resistor provides beforehand cushioning by pre-establishing a current limit that protects against the harmful effects of diode breakdown. Even when a diode fails, the load resistor has already been in place to prevent catastrophic current spread, cushioning the blow to the overall memory array reliability.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Stability of the object's composition

If a load resistor is used to stabilize resistance states, then the high resistance state can be maintained, but existing methods fail to restore defective cells from excessively low resistance state

Engineering Contradiction:
Improveresistance state stabilityVSAvoiddefective cell restoration
Core Design Contradiction:
Stability of the object's compositionVSEase of repair

Solution Approach 1:

The variable load resistor can be dynamically adjusted to different resistance values depending on the operational mode. During restoration operations, it can be set to a lower value to allow sufficient current to rebuild the oxide layer in defective cells, while during normal operation, it is set to a higher value to maintain stable resistance states and limit current.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The resistance value of the load resistor is changed based on the operational requirements. By adjusting this parameter, the system can transition between different operational modes: one optimized for maintaining stable resistance states during normal operation, and another optimized for restoring defective cells by allowing higher current flow.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively prevents the spread of excessive current to adjacent cells, allowing normal writing and reading operations by restoring the high resistance state of defective cells, thus maintaining the integrity of the memory array.

Implementation Method 1

the resistance value of a variable resistance element is changed due to a change between the oxidation and reduction states of variable resistance material, which is directly caused by an electric stimulus

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

the resistance value of a variable resistance element is changed due to a change between the oxidation and reduction states of variable resistance material

Methodology Applied
Scientific EffectReduction: Reduction

Implementation Method 3

a two-terminal diode 270 that allows a current to flow bidirectionally and has a nonlinear current-voltage characteristic

Methodology Applied
Scientific EffectDiode nonlinear current-voltage characteristic: Diode

Implementation Method 4

A semiconductor memory device is also proposed in which a variable load resistor is connected to crosspoint ReRAM

Methodology Applied
Scientific EffectVoltage division: Ohm's Law

Data Source

PatentUS8565004B2Nonvolatile memory device and method for programming the same
Publication Date: 2013.10.22 PANASONIC SEMICON SOLUTIONS CO LTD
  • US8565004B2 patent drawing
  • US8565004B2 patent drawing
  • US8565004B2 patent drawing

AI summary

A method for programming a nonvolatile memory device according to the present invention includes a step of detecting an excessively low resistance cell from among a plurality of memory cells (11) (S101); a step of changing the resistance value of a load resistor (121) to a second resistance value smaller than a first resistance value (S103); and a step of causing, by applying a voltage pulse to a series circuit including the excessively low resistance cell and the load resistor (121) having the second resistance value, a variable resistance element (105) included in the excessively low resistance cell to shift to a second high resistance state having a resistance value greater than that of the first low resistance state (S104).