Variable-Radix Processor Sequencing Against Side-Channel Leakage
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Solution Overview
Problem
Conventional cryptographic operations are vulnerable to side-channel attacks that exploit statistically correlated and externally observable system effects, such as power consumption and timing patterns, despite being performed within secure processors.
Innovation Solution
Implementing variable radix processing techniques that dynamically vary the sequencing of mathematical operations, using a variable radix vector to disrupt the correlation between power signatures and timing patterns, thereby making it difficult for attackers to derive secret information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional cryptographic operations are performed with fixed sequencing, then operational efficiency is maintained, but the system becomes vulnerable to side-channel attacks through statistically correlated power consumption and timing patterns
Solution Approach 1:
The patent applies dynamics by making the operation sequencing variable rather than fixed. The system dynamically changes the order of cryptographic operations based on a generated permutation sequence, so that identical cryptographic operations produce different execution patterns. This dynamic reordering disrupts the statistical correlations that side-channel attacks rely upon, while maintaining the same cryptographic functionality.
Solution Approach 2:
The patent changes the parameter of operation sequencing from a fixed state to a variable state. By introducing a permutation sequence that randomly reorders operations, the system alters the temporal and power consumption parameters of cryptographic execution. This parameter change ensures that power consumption patterns and timing characteristics no longer directly correlate with the underlying cryptographic logic, thereby preventing side-channel analysis.
2Reliability
If variable radix processing is implemented to disrupt power signatures, then resistance to side-channel attacks improves, but processing time and computational overhead increase
Solution Approach 1:
The patent applies preliminary action by generating the operation permutation sequence before executing the cryptographic operations. The system prepares the reordered execution plan in advance, so that during the actual cryptographic processing, operations simply follow the pre-determined sequence without requiring real-time decision-making. This preliminary preparation minimizes runtime overhead while achieving the security benefit of variable sequencing.
Data Source
AI summary
This disclosure provides techniques for permuting the performance of associative functions by circuitry of a digital device or processor in a manner that disrupts the effectiveness of side channel attacks. In specific embodiments, associative functions performed by math processing circuitry in such a device are permuted so as to mask/obfuscate a power signature and/or other externally-observable effects while providing an invariant result as an output. In still more detailed embodiments, a variable radix processor is used to provide conversion of an input operand to a permutation of associative functions. The radix can be varied across different products and/or can be dynamically varied during operation of a device, e.g., based on seeds from a random number generator. In still more detailed embodiments, conventional “double-and-add” or “square-and-multiply” execution units can be variably scripted to mask power signature and/or other patterns.