Variable Resistance Memory Device with Bidirectional Switch for Leakage Reduction
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Solution Overview
Problem
Highly integrated phase change random access memory (PRAM) devices face challenges in preventing current leakage due to precharging of word lines and bit lines, which affects access speed and power consumption.
Innovation Solution
A memory device with a bidirectional switch is designed, where the cell array is divided into a 'cool zone' and a 'hot zone' based on voltage states, with the cool zone maintained at a discharge state and the hot zone at a precharge state during standby, reducing potential leakage current and enabling high-speed access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If word lines and bit lines are precharged in standby state to support high access speed, then access speed is improved, but current leakage increases
Solution Approach 1:
The cell array is divided into multiple banks, and each bank is independently precharged or discharged based on access patterns. This segmentation allows only the necessary banks to maintain precharge voltage, reducing overall current leakage while preserving fast access speed for frequently accessed data.
Solution Approach 2:
The precharge state of word lines and bit lines is dynamically adjusted based on access frequency and timing. Frequently accessed banks remain in precharged state, while less accessed banks are discharged to reduce leakage. This dynamic state management resolves the contradiction between maintaining speed and reducing energy loss.
2Quantity of substance
If bidirectional switch is used to form three-dimensional PRAM cell structure, then integration density is improved, but voltage control complexity increases
Solution Approach 1:
The cell array is segmented into multiple banks with independent voltage control. Each bank can be independently precharged or discharged, simplifying the overall voltage control by breaking down the complex multi-line control into manageable bank-level control units.
Solution Approach 2:
Word lines and bit lines are precharged to appropriate voltage levels before access operations. This preliminary action ensures that when a memory cell is accessed, the bidirectional switch can operate correctly without requiring complex real-time voltage negotiation, thus reducing control complexity.
3Speed
If all word lines and bit lines are maintained in precharge state, then access speed is improved, but power consumption increases
Solution Approach 1:
The memory device divides the cell array into multiple banks, allowing selective precharging of only those banks that are likely to be accessed. This segmentation enables the system to maintain fast access speed for active banks while reducing power consumption by discharging inactive banks.
Solution Approach 2:
The voltage state of word lines and bit lines is changed from a static all-precharged state to a dynamic state where voltage levels are adjusted based on access patterns. Frequently accessed banks maintain precharge voltage, while less accessed banks are discharged, optimizing the balance between speed and power consumption.
Data Source
AI summary
A memory device includes: a cell array connected to a plurality of word lines and bit lines, the cell array including a plurality of memory cells each including a variable resistance element and a bidirectional selection element; a selection circuit that selects a selected word line and a selected bit line; and control logic that controls the selection circuit such that in a stand-by state, wherein the word lines and the bit lines which are connected to memory cells of a first area of the cell array are maintained in a discharge state, and the word lines and bit lines which are connected to memory cells of a second area of the cell array are maintained in a precharge state.