Variable Resistance Memory Device Uniform Driving Currents
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in achieving uniformity of driving currents and voltages due to variations in resistance and threshold voltage across different regions of the memory cells, leading to inefficiencies in memory device performance.
Innovation Solution
A variable resistance memory device is designed with a substrate having a peripheral and core region, featuring first and second conductive lines and memory cells with different resistance or threshold voltage elements in the near and far regions, which compensate for line resistances and voltage drops, ensuring uniform driving currents and voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are disposed across the core region including both near and far regions, then the memory device can store data in multiple regions, but the driving currents and voltages become non-uniform due to line resistances and voltage drops
Solution Approach 1:
The patent applies local quality by configuring memory cells in the near region with higher resistance or threshold voltage compared to memory cells in the far region. This spatial variation in electrical characteristics compensates for the voltage drops and line resistances that occur across the core region, ensuring that memory cells at different locations experience more uniform driving conditions despite their varying distances from peripheral circuits.
2Ease of manufacture
If memory cells in the near region have the same resistance as those in the far region, then manufacturing is simplified, but the driving currents and voltages become non-uniform leading to performance inefficiency
Solution Approach 1:
The patent implements local quality by differentiating the resistance or threshold voltage of memory cells based on their location within the core region. Near region memory cells are configured with higher resistance or threshold voltage values, while far region memory cells have lower values. This location-dependent configuration optimizes the electrical characteristics of each memory cell to compensate for positional variations in the circuit, thereby improving overall device efficiency without significantly complicating the manufacturing process.
Data Source
AI summary
A variable resistance memory device includes: a substrate including a peripheral region and a core region, the core region including a far region spaced apart from the peripheral region and a near region between the far region and the peripheral region; first conductive lines disposed on the substrate and extending in a first direction; second conductive lines disposed on the first conductive lines and extending in a second direction intersecting the first direction, and memory cells disposed between the first and second conductive lines on the core region. The memory cells include a near memory cell disposed on the near region, and a far memory cell disposed on the far region, wherein a resistance or threshold voltage of the near memory cell, controlling connection of each of the memory cells to a corresponding one of the second conductive lines, is different from that of the far memory cell.