Variable Resistance Memory Sidewall Contact Design

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Solution Overview

Problem

Next-generation semiconductor memory devices face challenges in maintaining reliable contact between the upper electrode and variable resistance patterns due to reduced contact areas and potential interfacial separation caused by thermal processes, affecting the reliability and reset current of the memory devices.

Innovation Solution

A variable resistance memory device design where the upper electrode is in direct contact with both the top surface and sidewalls of the variable resistance pattern, with the pattern protruding above a mold layer, increasing the contact area and reducing interfacial separation risks, and a method involving a hydrogen plasma treatment to convert a sacrificial layer for exposing sidewalls and forming the electrode structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the upper electrode is made to contact only the top surface of the variable resistance pattern, then the device structure is simpler, but the contact area is reduced and interfacial separation risk increases

Engineering Contradiction:
Improvedevice structureVSAvoidcontact reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent transitions from single-point top surface contact to multi-dimensional contact by having the upper electrode contact both the top surface and the sidewalls of the variable resistance pattern. This dimensional expansion of the contact interface significantly increases the total contact area and distributes mechanical stress, thereby improving contact reliability without substantially complicating the device structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The upper electrode is designed to wrap around and enclose portions of the variable resistance pattern, creating a nested configuration where the electrode contains the pattern from above and the sides. This nesting arrangement maximizes the contact interface area while maintaining a compact overall structure, effectively resolving the contradiction between structural simplicity and contact reliability.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If the variable resistance pattern is made to protrude above the mold layer, then the contact area between upper electrode and pattern is increased, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvecontact areaVSAvoidmanufacturing process
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

The mold layer is strategically positioned and designed to be removed after the variable resistance pattern is formed but before the upper electrode is deposited. This preliminary removal creates the necessary protruding geometry of the pattern, enabling the increased contact area design to be achieved through a systematic, multi-step manufacturing process rather than a single complex operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The mold layer serves as a temporary intermediary structure during fabrication. It supports the variable resistance pattern during formation, then is selectively removed to expose the pattern's top surface and sidewalls for enhanced electrode contact. This intermediary approach allows the complex protruding geometry to be achieved through standard fabrication techniques applied in sequence.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the upper electrode contacts the sidewall of the variable resistance pattern, then parasitic resistance is reduced and reliability is improved, but the risk of interfacial separation during thermal processes increases

Engineering Contradiction:
Improvedevice reliabilityVSAvoidinterfacial separation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent merges the top surface contact and sidewall contact into a unified, continuous contact interface between the upper electrode and the variable resistance pattern. This combined contact configuration distributes thermal and mechanical stresses across a larger, more uniform interface area, reducing the likelihood of localized stress concentration that would lead to interfacial separation during thermal processing.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the geometric parameters of the contact interface by extending contact from a single top surface point to include vertical sidewall surfaces. This parameter change increases the total contact area and alters the stress distribution characteristics, thereby improving reliability while mitigating separation risks through enhanced mechanical interlocking and stress distribution.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the reliability of the memory device by increasing the contact area between the upper electrode and variable resistance patterns, reducing parasitic resistance, and minimizing the risk of separation, thereby improving the overall performance and stability of the device.

Implementation Method 1

treating a top surface of the mold layer by a hydrogen plasma to break a combination of silicon and nitrogen in the silicon nitride layer

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 2

combining the silicon broken from the nitrogen with oxygen in an air to form the silicon oxide layer

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS9118003B2Variable resistance memory devices and method of forming the same
Publication Date: 2015.08.25 SAMSUNG ELECTRONICS CO LTD
  • US9118003B2 patent drawing
  • US9118003B2 patent drawing
  • US9118003B2 patent drawing

AI summary

A variable resistance memory device includes a lower electrode on a substrate, a variable resistance pattern on the lower electrode, and an upper electrode on the variable resistance pattern. The upper electrode is in contact with at least a sidewall of the variable resistance pattern.