Variable Resistance Reference Cell Circuit for Nonvolatile Memory
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Solution Overview
Problem
Existing nonvolatile memory devices with variable resistance memory elements face challenges in maintaining stable read operations and data retention due to variations in memory cell resistance values caused by manufacturing conditions and environmental factors, leading to degraded access time and reliability.
Innovation Solution
A reference cell circuit is implemented with two variable resistance elements that can be set to target resistance states, allowing for comparison and adjustment to achieve resistance values close to the upper and lower limits of the resistance distribution range, enabling stable operation and data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reference cells are formed with fixed resistance values to enable data reading comparison, then read operation stability is improved, but manufacturing precision deteriorates due to resistance value variations from manufacturing conditions and environmental factors
Solution Approach 1:
The reference cell resistance value is changed from a fixed static value to a dynamically adjustable value. The reference cell includes a variable resistance element that can be set to different resistance values through write operations, allowing the reference value to adapt to manufacturing variations and environmental changes, thus resolving the contradiction between read stability and manufacturing precision
Solution Approach 2:
The resistance value parameter of the reference cell is made changeable through electrical write operations. By applying specific voltage pulses, the reference cell's resistance can be adjusted between different states (e.g., low resistance state and high resistance state), enabling the system to compensate for manufacturing variations and maintain reliable read operations
2Measurement precision
If reference cells use intermediate resistance states for data comparison, then data reading accuracy is improved, but device complexity increases due to the need for multiple reference cells with different resistance values
Solution Approach 1:
The reference cell is designed to perform multiple functions: it can be set to different resistance states to serve as different reference values for comparing multiple data states. A single reference cell structure can replace multiple fixed reference cells by dynamically changing its resistance value through write operations, thereby reducing device complexity while maintaining reading accuracy
Solution Approach 2:
The reference cell dynamically changes its resistance value based on the data state being read. By sequentially setting the reference cell to different resistance values corresponding to different data states (e.g., 0, 1, 2, 3), the system achieves high reading accuracy without requiring multiple static reference cells, thus reducing overall device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for precise setting of reference cell resistance values, improving data retention and access time by reflecting the distribution range of memory cell resistance values, thereby enhancing the reliability and stability of the nonvolatile memory device.
Implementation Method 1
a resistance random access memory (ReRAM) which is based on changes in electric resistance value caused due to oxidation-reduction reaction
Implementation Method 2
a magnetoresistive random access memory (MRAM) which is based on changes in magnetroresistance
Implementation Method 3
a phase change random access memory (PCRAM) which is based on changes in electric resistance value caused due to phase change
Data Source
AI summary
Included are reference cells each including a variable resistance element which reversibly changes between a predetermined low resistance state LR and a predetermined high resistance state HR according to an application of an electric signal, a comparator which compares resistance values of the reference cells, a pulse generation circuit which generates an electric signal for setting the reference cells to LR or HR, and a control circuit which controls operations where application of the generated electric signal to one of the reference cells corresponding to a comparison result of the comparator and application of a new electric signal generated by the pulse generation circuit to one of the reference cells corresponding to a new comparison result of the comparator are repeated, and then one of the reference cells corresponding to a final comparison result of the comparator is connected to an output terminal.