Three-Terminal Variable Resistance Switching Element Configuration

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Solution Overview

Problem

The existing configuration of semiconductor devices with reconfigurable wiring networks using variable resistance switching elements results in increased circuit area due to the need for additional MOS transistors for bypassing, which is inefficient in terms of space utilization.

Innovation Solution

The method involves using three-terminal variable resistance switching elements connected in series with a common gate line and potential holding sections, along with a bus holder or pull-up resistor to eliminate the need for extra MOS transistors, allowing for a reconfigurable wiring network in a smaller area without requiring MOS transistors for bypassing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional MOS transistors are used for bypassing in variable resistance switching elements, then the reliability and controllability of the reconfigurable wiring network is improved, but the circuit area increases

Engineering Contradiction:
Improvereliability of reconfigurable wiring networkVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts and eliminates the MOS transistor component from the variable resistance switching element structure. By removing the MOS transistor bypass mechanism and replacing it with a direct three-terminal variable resistance switching element design, the circuit area is reduced while maintaining the essential switching functionality through the variable resistance element alone.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies local quality by using three-terminal variable resistance switching elements with different resistance states at different locations within the reconfigurable wiring network. Each switching element can be independently programmed to high-resistance or low-resistance state, allowing localized control of signal routing without requiring additional MOS transistors at each position.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If three-terminal variable resistance switching elements are used without additional MOS transistors, then the circuit area is reduced, but the ability to control and bypass the switching elements is compromised

Engineering Contradiction:
Improvecircuit areaVSAvoidcontrollability of switching elements
Core Design Contradiction:
Area of stationary objectVSEase of operation

Solution Approach 1:

The three-terminal variable resistance switching element is designed to perform multiple functions simultaneously: it acts as both the switching element and the bypass mechanism. The element can be programmed to high-resistance state for blocking signals or low-resistance state for allowing signals, eliminating the need for separate MOS transistor control structures while maintaining full controllability through programming.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent utilizes parameter changes by programming the resistance state of the three-terminal variable resistance switching elements. By changing the resistance parameter between high and low states through programming, the switching elements can be controlled to either block or allow signal passage, providing the necessary controllability without additional MOS transistors.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration method enables a reconfigurable wiring network to be realized in a smaller area, reducing the circuit size and eliminating the need for additional MOS transistors, thereby enhancing space efficiency and operational flexibility.

Implementation Method 1

Ion conduction layer 22 is made, for example, of tantalum oxide

Methodology Applied
Scientific EffectIon conduction: Conduction (electrical)

Implementation Method 2

precipitated metal 25 is precipitated from drain electrode 21 toward source electrode 20

Methodology Applied
Scientific EffectMetal ion precipitation: Precipitation

Implementation Method 3

MOS transistors 2aY, 2bY, 2cY, . . . arranged in the vertical direction have their gates connected to common gate line 3Y

Methodology Applied
Scientific EffectField effect transistor conduction: Conduction (electrical)

Data Source

PatentUS8189365B2Semiconductor device configuration method
Publication Date: 2012.05.29 NEC CORP
  • US8189365B2 patent drawing
  • US8189365B2 patent drawing
  • US8189365B2 patent drawing

AI summary

A plurality of three-terminal variable resistance switching elements each having a source electrode, a drain electrode, and a gate electrode are connected to each other in series. The source electrode of each of the three-terminal variable resistance switching elements and the drain electrode of its adjacent three-terminal variable resistance switching element are connected to each other through a wiring segment to form a lane. A potential holding section for holding a predetermined potential level is connected to the wiring segment. A column group is configured by selecting one of the three-terminal variable resistance elements in each lane. A common gate line is connected to each of the gate electrodes of the three-terminal variable resistance elements belonging to the column group.