Nanoinformatics TRIZ Cases

UV curing a photosensitive metal-organic precursor eliminates prepolymer resin steps, reducing process complexity and improving LED light extraction efficiency.

Internal spacers maintain channel strain in gate-wrap-around transistors, preventing relaxation during epitaxial source and drain formation.

A floating body transistor memory cell achieves bi-stability through impact ionization to compensate for charge leakage and maintain reliable data storage.

Ultra-thin metallic layers on EUV mask blanks maintain optical transmittance while providing mechanical strength for defect correction.

A semiconductor device uses a carbon-containing filling insulating layer to align the capping pattern top surface with the element isolation region.

Nanocomposite layers mitigate lattice mismatch and thermal expansion differences, enabling high-quality epitaxial growth of nitride semiconductor devices.

Silicon-rich germanium patterns lower potential barriers in fin field effect transistors to boost on-currents.

A transistor device uses self-aligned gate-cuts with sloped sidewalls on a sacrificial spacer to define precise isolation regions.

Selective etching creates nanosheets and fins on one wafer, optimizing electron and hole mobility for enhanced CMOS performance.

A hole blocking layer combines fullerene derivatives with a transparent hole transport material to manage charge carrier movement in organic photoelectric conversion devices.

Modified branched polymer conjugates transport and anchor bioactive materials onto solid surfaces through direct covalent linking.

Recessed chuck features prevent edge contact and particulation by maintaining template clearance, reducing separation forces and pattern thickness variations.

A moveable channel bridges source and drain electrodes via electrostatic actuation.

Periodic X-shaped plasmonic antennas on a graphene layer reduce polarization dependence by capturing arbitrary polarized light through resonance.

Sequential dry plasma etching using a patterned hard mask layer stack improves critical dimension uniformity in vertical pillar structures.

Silver alloy spacer layers increase electrical resistivity in current-perpendicular-to-the-plane giant magnetoresistive sensors.

A three-terminal variable resistance switching element configuration method utilizes a common gate line and potential holding sections to establish a reconfigurable wiring network.

Selective etching forms internal spacers between nanowires, reducing parasitic capacitance while maintaining dielectric coverage.

Segmented focus positioning differentiates convex and concave mask blank defects to resolve sensitivity versus inspection time trade-offs.

A segregation region with tailored impurities modulates work functions to lower contact resistance while maintaining self-aligned geometry.

Segmented fabrication uses sacrificial layers to integrate heterogeneous channel materials, overcoming etch selectivity limits and avoiding crystal damage.

Self-assembling nanoparticle chains stabilize meta-stable switching elements through columbic-induced mechanical stress contact.

Pitch-proportional deposition of work function setting material enables multiple threshold voltage nanowire FETs without random dopant fluctuation.

Bit patterned media servo patterns use dot composites to encode tracking signals, reducing medium noise from random grain boundaries.

Carbon nanotube channels maintain high conductivity in scaled devices, resolving the trade-off between integration density and photo reception capability.

Stacked three-dimensional transistors in a CFET layout increase integration density while reducing off-current and power consumption.

Metal-doped germanium oxide annealing converts dielectric oxide to a metallic germanide layer between source/drain regions and channel stacks.

Carbon nanotubes disperse reactive fuel to create thermal waves generating high-power electrical pulses, addressing low energy density in miniaturized devices.

TiO2-doped quartz glass substrates with negative CTE gradients minimize thermal deformations and image aberrations in EUV lithography projection lenses.

Staggered discrete magnetic elements in servo sectors resolve superparamagnetism limits, enabling precise head positioning and higher areal density.

A multi-bridge channel field effect transistor uses a specific gate spacer and etch blocking pattern to enhance facet surface contact.

A hard magnet biasing structure for CPP MR sensors uses a crystalline MgO insulating layer and FePt alloy to enhance magnetic properties.

Heterocyclic donor blocks with electron-withdrawing groups boost exciton diffusion and energy conversion while maintaining solution-processability.

Varying the gate dielectric thickness along the channel improves subthreshold swing without increasing gate leakage currents or manufacturing complexity.

A graded silicon carbide germanium carbide tunnel insulator enables charge trapping in a single memory cell structure.

A three-dimensional stacked field-effect transistor structure minimizes planar area in static random-access memory devices.

Parallel beam expansion resolves productivity bottlenecks in sequential ion addressing by enabling simultaneous high-precision optical association.

Hollow portions in the recording layer reduce element area and write current density, enabling practical spin-transfer MRAM operation.

In-situ reduction of conductive nanoparticle ions forms uniform memory layers, avoiding encapsulation and enabling low-voltage portable electronics.

A nanoscale transistor uses a nanotube channel and doped nanowire source drain regions to control current flow.

A carbon nanotube neuron device uses a laminate structure surrounding the channel region to enhance gate control and simplify the overall device architecture.

A state-changeable device manipulates surface plasmon polaritons via variable conductivity coupling between nanoparticles.

Integrating a quantum well element into a semiconductor junction traps charges to modulate built-in potential, reducing device footprint and power consumption.

Integrates optical, force, and particle beam measurements to precisely compensate buried defects in EUV photomasks without removing the multi-layer structure.