Variable Resistive Memory Gap Structure Thermal Crosstalk
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Solution Overview
Problem
The scaling down of flash memories is limited by thermal crosstalk between adjacent memory cells in phase-change memory devices, leading to reliability issues such as data loss and malfunction, especially when the device size is equal to or less than 65 nm.
Innovation Solution
A variable resistive memory device is designed with a gap between the sidewall of the variable resistive layer and the inner side surface of the opening in the interlayer insulating film, reducing the width of the variable resistive layer and minimizing thermal interference by using a sacrificial film to form this gap, which is then filled with a gas of lower thermal conductivity than the interlayer insulating film.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the device size is scaled down to 65 nm or less, then the density of integration is improved, but thermal crosstalk between adjacent memory cells increases causing reliability degradation
Solution Approach 1:
The patent introduces a gap structure that segments the thermal conduction path between adjacent memory cells. The gap divides the continuous thermal pathway into separate sections, preventing heat from propagating from one memory cell to another, thus eliminating thermal crosstalk while maintaining high integration density
Solution Approach 2:
The gap acts as a thermal intermediary or barrier between adjacent memory cells. By introducing this intermediate space filled with low thermal conductivity material (such as air or vacuum), heat transfer between cells is blocked, allowing reliable operation at scaled dimensions
2Object-affected harmful factors
If the width of the variable resistive layer is reduced to minimize thermal interference, then thermal crosstalk is suppressed, but the driving speed and power consumption are affected
Solution Approach 1:
The gap segments the thermal field, creating isolated thermal zones around each variable resistive layer. This allows each cell to be independently controlled with optimized dimensions, maintaining fast switching speeds while preventing thermal interference with neighboring cells
Solution Approach 2:
The patent applies different thermal conductivity properties to different regions: the gap region has low thermal conductivity to isolate heat, while the variable resistive layers maintain their original material properties for fast switching. This localized quality differentiation resolves the contradiction between thermal isolation and speed performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design increases the driving speed, reduces power consumption, and enhances the density of integration while preventing thermal interference between memory cells, thereby improving the reliability and scalability of the memory device.
Implementation Method 1
a sidewall of the variable resistive layer is separated from an inner side surface of the opening to define a gap between the sidewall of the variable resistive layer and the inner side surface of the opening
Data Source
AI summary
Provided are a variable resistive memory device and a method of fabricating the same. The variable resistive memory device includes an interlayer insulating film having an opening therein, the opening exposing a surface of a first electrode which is disposed at a bottom of the opening. A variable resistive layer is formed in the opening and a second electrode is formed on the variable resistive layer. The variable resistive layer has a sidewall that is separated from an inner side surface of the opening to define a gap between the sidewall of the variable resistive layer and the inner side surface of the opening.