Variable Resistor Spacer with Uniform Linewidth for Low Reset Current
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Solution Overview
Problem
The existing fabrication processes for variable resistive memory devices are complex due to the formation of variable resistor devices within holes, which complicates the reduction of reset current through contact area minimization.
Innovation Solution
A method is developed to form a semiconductor apparatus with a variable resistor device featuring a spacer with a uniform top and bottom linewidth, using a first insulating layer formed by PVD and a second layer by CVD or ALD for superior step coverage, resulting in a ring-shaped spacer that reduces the contact area with the lower electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the variable resistor device is formed in a hole with fine size to reduce contact area and reset current, then the reset current is reduced, but the fabrication process becomes complicated
Solution Approach 1:
The fabrication process is segmented into distinct stages: forming mandrels with uniform cross-section, depositing spacers on mandrel sidewalls, and selectively removing mandrels. This segmentation transforms the complex single-step hole formation into manageable sequential steps, reducing overall process complexity while maintaining the fine contact area geometry needed for low reset current
Solution Approach 2:
Mandrels are introduced as intermediary structures that temporarily define the contact area geometry during fabrication. These mandrels with uniform cross-sections serve as placeholders that guide spacer formation, enabling precise control of the final contact area without requiring direct complex patterning of the variable resistor device itself
2Ease of manufacture
If a single-layer spacer is formed to simplify the structure, then the fabrication is easier, but the step coverage is insufficient
Solution Approach 1:
The spacer is constructed as a composite structure with multiple layers, each deposited using optimized processes for specific functional requirements. The first spacer layer provides base coverage while the second spacer layer enhances step coverage in difficult-to-reach areas, creating a composite structure that achieves both manufacturing feasibility and precise geometric control
Solution Approach 2:
The spacer formation extends into the vertical dimension with multiple deposited layers at different heights and compositions. This multi-layer approach allows each layer to address specific step coverage challenges in different vertical zones, achieving comprehensive coverage that a single-layer approach cannot provide
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the fabrication process and reduces the reset current by maintaining a uniform inner diameter of the spacer, allowing for easier variation of resistance even at low currents.
Implementation Method 1
forming a first insulating layer in the variable resistor region through a first method
Implementation Method 2
forming a second insulating layer along a surface of the first insulating layer in the variable resistor region through a second method for providing step coverage superior to the first method
Data Source
AI summary
A method for fabricating a semiconductor apparatus includes forming a variable resistor region, and forming a spacer having a top linewidth and a bottom linewidth substantially equal to each other in the variable resistor region. The forming of the spacer includes forming a first insulating layer in the variable resistor region through a first method, forming a second insulating layer along a surface of the first insulating layer in the variable resistor region through a second method for providing step coverage superior to the first method, and etching the first and second insulating layers.


