Variable Sensitivity Nodes With On-Board Transfer Function Control

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Solution Overview

Problem

Existing neural networks implemented in ASICs lack the ability to efficiently adjust transfer functions of nodes without relying on peripheral processing and memories, limiting the speed and efficiency of signal processing.

Innovation Solution

An ASIC-implemented neural network with variable sensitivity nodes that include an input setting channel, logic element, and on-board parameter-setting element, allowing immediate adjustment of transfer functions through stored parameter settings, eliminating reliance on peripheral processing and enhancing processing speed and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If transfer function settings are stored in peripheral memories, then the neural network can be configured, but the processing speed decreases due to reliance on peripheral processing

Engineering Contradiction:
Improvetransfer function configurabilityVSAvoidsignal processing speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent merges the transfer function setting storage capability directly into the node circuitry itself, eliminating the need for separate peripheral memories. Each node includes an on-board memory element that stores its transfer function settings locally, allowing immediate access during signal processing without relying on external memory access operations.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces an on-board parameter-setting element as an intermediary component within each node that enables local configuration of transfer function parameters. This intermediary allows the node to self-configure without requiring peripheral processing interventions, thereby maintaining configurability while improving processing speed.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If transfer function settings are stored on-board in each node, then processing speed increases, but device complexity increases

Engineering Contradiction:
Improvesignal processing speedVSAvoidnode structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent designs the on-board parameter-setting element to serve multiple functions: it stores transfer function settings, enables local configuration, and facilitates immediate parameter adjustment without requiring separate dedicated memory structures. This multi-functional approach reduces overall device complexity despite adding storage capability to each node.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent utilizes parameter changes in the transfer function settings stored in on-board memory to achieve reconfiguration of node behavior. By allowing the transfer function parameters (such as weights and biases) to be dynamically changed within the node itself, the system achieves high processing speed without requiring complex external reconfiguration mechanisms.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If immediate weights or parameters are applied to nodes, then adaptability improves, but the complexity of implementing the adjustment mechanism increases

Engineering Contradiction:
Improvetransfer function adjustabilityVSAvoidadjustment mechanism complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements self-service capability within each node through the on-board parameter-setting element that enables the node to adjust its own transfer function settings independently. This self-service mechanism allows immediate application of weights or parameters without requiring complex external adjustment mechanisms or peripheral processing interventions.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12430548B2Variable sensitivity node
Publication Date: 2025.09.30 UNIV OF MARYLAND
  • US12430548B2 patent drawing
  • US12430548B2 patent drawing
  • US12430548B2 patent drawing

AI summary

A variable sensitivity node for a neural network that can be implemented as an information processing device such as an ASIC, and can be adjusted simply by applying immediate weights or parameters that change and/or amplify or de-amplify the output of the nodes. The information processing device has one or more nodes each with an input setting channel, a logic element configured to translate the input signal into the output signal based on a mathematical function that includes a parameter setting, and a parameter-setting element configured to set the parameter setting based on a control input to the input setting channel, thereby altering the mathematical relationship of the logic element without compromising speed and efficiency.