Variable Spacing Interconnect Routing for IC Noise and Electromigration
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Solution Overview
Problem
Current automatic routing techniques for integrated circuits do not adequately consider current density rules, leading to issues like electromigration, IR voltage drop, and self-heating, which affect the reliability and performance of the circuits.
Innovation Solution
The technique involves automatically routing interconnects with varying track widths and spacings based on current, capacitance, inductance, and electromigration considerations, using a shape-based approach that adjusts spacing between tracks to improve noise immunity and reduce these effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If uniform spacing is used between interconnect tracks, then routing simplicity is maintained, but noise immunity and performance deteriorate due to inadequate consideration of current density and electromagnetic effects
Solution Approach 1:
The patent applies local quality by varying the spacing between interconnect tracks based on local current density requirements and electromagnetic interference considerations. Instead of uniform spacing, the router dynamically adjusts spacing in different regions of the chip to optimize noise immunity and current handling where needed, while maintaining tighter spacing in regions where it is acceptable.
Solution Approach 2:
The patent implements dynamics by making the track spacing adaptive rather than static. The spacing between tracks is dynamically determined during the routing process based on real-time calculations of current density, noise susceptibility, and electromagnetic effects. This allows the routing to adapt to different design requirements and optimize performance automatically.
2Reliability
If track spacing is increased to reduce electromigration and improve noise immunity, then reliability improves, but area utilization deteriorates
Solution Approach 1:
The patent applies local quality by increasing track spacing only in specific regions where high current density or noise susceptibility is detected, rather than uniformly increasing spacing across the entire chip. This localized approach maintains reliability where needed while preserving area utilization in regions where tighter spacing is acceptable.
Solution Approach 2:
The patent changes the spacing parameter dynamically based on local conditions such as current magnitude, signal sensitivity, and proximity to other interconnects. By adjusting this critical parameter locally rather than globally, the patent achieves improved electromigration resistance and noise immunity without proportionally increasing overall chip area.
3Reliability
If variable spacing is implemented based on current density and performance requirements, then performance and reliability improve, but routing complexity and computational requirements worsen
Solution Approach 1:
The patent applies preliminary action by pre-calculating or pre-determining spacing requirements based on current density estimates and performance criteria before finalizing the routing. This allows the routing algorithm to work with predetermined spacing constraints rather than calculating optimal spacing for every possible routing configuration, reducing computational complexity.
Solution Approach 2:
The patent implements self-service by enabling the routing algorithm to automatically determine appropriate track spacing based on embedded design rules and performance criteria, without requiring manual intervention or complex external optimization. The router serves itself by making intelligent spacing decisions based on local conditions and predefined guidelines.
Data Source
AI summary
A technique will automatically route interconnect of an integrated circuit and adjust spacing between tracks or interconnect in order to improve performance or reduce electromigration effects. By increasing spacing between certain tracks or moving tracks, performance can improve because a track will be more noise immunity from nearby tracks on the same layer or on different layers. The automatic router will adjust spacing between tracks depending on one or more factors. These factors may include current associated with a track, width of a track, capacitance, inductance, and electromigration. In a specific implementation, the technique uses a shape-based approach where a grid is not used. The technique may further vary the width of the tracks.