Varied Epitaxial Source-Drain Structures for Sub-10 Nm Scaling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The scaling of multi-gate transistors to smaller dimensions and increased densities poses overwhelming constraints on semiconductor processes, limiting further extension into the 10 nanometer node or sub-10 nanometer node range.
Innovation Solution
The implementation of integrated circuit structures with varied epitaxial source or drain structures, where epitaxial material is grown differently in various width regions of nanoribbons, and the use of differentiated backside access features for epitaxial source or drain contact structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-gate transistors are scaled to smaller dimensions and increased densities, then device capacity and functional unit density are improved, but process constraints and fabrication difficulty become overwhelming
Solution Approach 1:
The patent implements selective epitaxial growth with different growth conditions for different regions of the transistor. Specifically, first epitaxial source or drain structures are grown with initial growth conditions in a first region, then second epitaxial source or drain structures are grown with different growth conditions in a second region. This local differentiation allows optimization of each region's properties to meet the demanding process constraints while maintaining high device capacity.
Solution Approach 2:
The epitaxial growth process is divided into multiple sequential stages with distinct growth conditions. The patent performs initial epitaxial growth to form a first set of structures, then performs additional epitaxial growth to form a second set of structures with different properties. This segmentation of the growth process enables precise control over the complex fabrication requirements at scaled dimensions.
2Manufacturing precision
If conventional fabrication processes are used, then manufacturing simplicity is maintained, but extension into 10 nanometer node or sub-10 nanometer node range is limited
Solution Approach 1:
The patent changes multiple epitaxial growth parameters including temperature, pressure, gas flow rates, and composition ratios between different growth regions and stages. These parameter changes enable precise control of the epitaxial structures at 10nm and sub-10nm nodes, achieving the required manufacturing precision while managing fabrication complexity through systematic parameter optimization.
3Reliability
If uniform epitaxial structures are used across all regions, then fabrication simplicity is maintained, but device performance optimization is limited
Solution Approach 1:
The patent applies different epitaxial growth conditions to different spatial regions of the device. First epitaxial source or drain structures in a first region are grown with initial growth conditions, while second epitaxial source or drain structures in a second region are grown with different growth conditions. This local quality differentiation optimizes device performance for each region's specific requirements while managing structural complexity through systematic variation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves device performance and yield by allowing for optimized epitaxial growth in varying width regions and enables efficient backside power delivery, reducing interconnect stress and enhancing semiconductor performance.
Implementation Method 1
epitaxial material is grown differently in various width regions of nanoribbons
Data Source
AI summary
Integrated circuit structures having varied epitaxial source or drain structures are described. In an example, an integrated circuit structure includes first, second and third pluralities of horizontally stacked nanowires or fins, and first, second and third gate stacks. A first epitaxial source or drain structure is between the first plurality of horizontally stacked nanowires or fin and the second plurality of horizontally stacked nanowires or fin, the first epitaxial source or drain structure having a lateral width. A second epitaxial source or drain structure is between the second plurality of horizontally stacked nanowires or fin and the third plurality of horizontally stacked nanowires or fin, the second epitaxial source or drain structure having a lateral width greater than the lateral width of the first epitaxial source or drain structure.


