On-Chip Inductor with Varying Trace Cross-Sections
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Solution Overview
Problem
Integrated circuit designs face challenges in increasing the quality factor (Q value) of on-chip inductors due to parasitic capacitance and reduced trace thickness, which limits the performance of RF circuits in system-on-chip (SOC) designs.
Innovation Solution
The design features symmetrically arranged winding portions with semicircular conductive traces of varying cross sections and line widths, utilizing multilayer structures to reduce conductor loss and maintain thickness, while preventing frequency range reduction due to parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the space between traces of the inductor is narrowed to reduce chip area, then the chip area is reduced, but the parasitic capacitance increases and Q value cannot be increased
Solution Approach 1:
The patent applies local quality by making the trace cross-section non-uniform along its length. Specifically, the trace has a first cross-sectional area at the inner radius and a second cross-sectional area at the outer radius, where these areas differ. This variation in local trace properties allows optimization of the inductor's electrical characteristics while maintaining compact geometry, resolving the contradiction between small chip area and high Q value.
2Adaptability or versatility
If thinner traces are used in SOC to integrate RF and digital circuits, then more functions are integrated on a single chip, but the Q value of inductors is reduced
Solution Approach 1:
The patent implements local quality by varying the trace cross-sectional area along its radial direction. The trace has different cross-sectional areas at different radial positions, allowing the inductor to achieve high Q value even with overall thin trace design. This enables SOC integration while maintaining RF circuit performance.
Solution Approach 2:
The patent transitions from considering only trace width (one dimension) to incorporating trace cross-sectional area variation in the radial direction (adding another dimension). By controlling the cross-sectional area profile through the trace thickness, the design achieves high Q value with thin traces suitable for SOC integration.
3Object-affected harmful factors
If symmetric winding portions are used to reduce common mode noise, then common mode noise is reduced, but parasitic capacitance increases due to adjacent traces in differential operation
Solution Approach 1:
The patent applies local quality by making each winding portion's trace cross-section vary along the radial direction, with different cross-sectional areas at inner and outer radii. This local variation reduces the parasitic capacitance between adjacent differential traces while maintaining the symmetric structure needed for common mode noise rejection.
Data Source
AI summary
An inductor comprises first and second winding portions symmetrically arranged in an insulating layer on a substrate. Each of the first and second winding portions comprises at least two semicircular conductive traces concentrically arranged. At least one of the relatively outer semicircular conductive traces has a cross section smaller than at least one of the relatively inner semicircular conductive traces.