VCO ADC Mean Frequency Calibration Without Replica Oscillators
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Solution Overview
Problem
VCO based ADCs require calibration of the mean frequency to maintain optimal performance, but existing methods involve additional power consumption and errors due to replica VCO mismatches.
Innovation Solution
A method that uses a negative feedback loop with the sum of phase-to-digital outputs to adjust the VCO mean frequency to the mid-reference frequency, eliminating the need for an additional replica VCO and associated components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a replica VCO and phase-to-digital converter are added to calibrate mean frequency, then calibration accuracy is improved, but power consumption and area increase
Solution Approach 1:
The patent applies self-service by using the existing phase-to-digital converter outputs to generate the calibration signal. The sum of the two phase-to-digital outputs is used to create an error signal that drives the calibration loop, eliminating the need for a separate replica VCO and its associated phase-to-digital converter. This makes the system calibrate itself using resources already present in the design.
Solution Approach 2:
The patent merges the calibration function with the existing signal processing path. By summing the outputs of the two phase-to-digital converters and using this sum to generate the calibration error signal, the patent combines multiple functions (signal conversion and frequency calibration) into a unified approach that shares hardware resources, thereby reducing overall power consumption and area.
2Measurement precision
If a replica VCO and phase-to-digital converter are added to calibrate mean frequency, then calibration accuracy is improved, but device complexity increases
Solution Approach 1:
The system performs self-calibration by utilizing its own operational outputs. The phase-to-digital converters, which are already necessary for the ADC function, provide the data needed for calibration. This self-service approach eliminates the need for separate calibration hardware, reducing device complexity while maintaining calibration accuracy.
Solution Approach 2:
The patent makes the existing phase-to-digital converters serve dual purposes: their primary function of converting VCO phase to digital values for signal processing, and a secondary function of providing data for frequency calibration. This multi-functionality reduces the need for dedicated calibration hardware, thereby simplifying the overall device architecture.
3Measurement precision
If a replica VCO is used for calibration, then mean frequency accuracy is improved, but mismatch errors are introduced
Solution Approach 1:
The patent merges the calibration reference with the actual operational VCOs. By using the sum of the outputs from the two phase-to-digital converters that are already driven by the pseudo-differential VCO, the patent ensures that the calibration reference is inherently matched to the actual VCO being calibrated, eliminating mismatch errors that would arise from using a separate replica VCO.
Solution Approach 2:
Instead of creating a physical replica VCO that could mismatch, the patent creates a virtual copy of the VCO output by summing the digital representations from the two phase-to-digital converters. This digital copying approach avoids the physical mismatch problems of replica VCOs while maintaining calibration accuracy.
Data Source
AI summary
A method is provided for calibrating the mean frequency of a voltage controlled oscillator (VCO) based analog-to-digital converter (ADC). The method accepts a differential analog input signal comprising a positive signal and a negative signal. The positive signal is converted into a first frequency and the negative signal is converted into a second frequency. The first frequency is converted into a first digital value and the second frequency is converted into a second digital value. The first digital value is added to the second digital value to find a common mode value, and the common mode value is compared to a predetermined common mode value to find a first error. The first error is converted to a first bias modification of the differential analog input signal, and in response to the differential analog input first bias modification, the first error is minimized.