VCO-ADC Rest Frequency Stabilization With CMFB Bias Feedback
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Solution Overview
Problem
Conventional VCO-ADCs face challenges in maintaining a stable rest frequency due to process-voltage-temperature (PVT) variations, which can increase power consumption and affect signal-to-quantization noise ratio and digital reconstruction, necessitating complex and labor-intensive calibration processes.
Innovation Solution
A feedback loop mechanism using a Common-Mode Feedback (CMFB) circuit with frequency-dependent resistors and an error amplifier to automatically stabilize the rest frequency, compensating for PVT variations without the need for calibration, by generating a bias voltage proportional to the rest frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional VCO-ADCs are used without calibration, then device complexity is reduced, but rest frequency stability deteriorates due to PVT variations
Solution Approach 1:
The VCO-ADC system performs self-calibration by automatically detecting and correcting its own rest frequency drift caused by PVT variations. The system uses its internal resources (VCO, ADC, control logic) to monitor and adjust the rest frequency without requiring external calibration equipment or manual intervention, thereby maintaining frequency stability while avoiding complex external calibration systems.
Solution Approach 2:
The system implements a feedback mechanism where the ADC continuously monitors the VCO output frequency and feeds this information back to a control logic unit. The control logic then adjusts the VCO tuning voltage to maintain the desired rest frequency. This closed-loop feedback ensures rest frequency stability while using only standard integrated circuit components.
2Stability of the object's composition
If calibration processes are implemented to stabilize rest frequency, then frequency stability is improved, but ease of operation deteriorates due to labor-intensive calibration requirements
Solution Approach 1:
The system performs self-calibration by automatically detecting and correcting its own rest frequency drift caused by PVT variations. The system uses its internal resources (VCO, ADC, control logic) to monitor and adjust the rest frequency without requiring external calibration equipment or manual intervention, thereby maintaining frequency stability while avoiding complex external calibration systems.
Solution Approach 2:
The system implements a feedback mechanism where the ADC continuously monitors the VCO output frequency and feeds this information back to a control logic unit. The control logic then adjusts the VCO tuning voltage to maintain the desired rest frequency. This closed-loop feedback ensures rest frequency stability while using only standard integrated circuit components.
3Use of energy by moving object
If rest frequency drift occurs due to PVT variations, then power consumption increases, but frequency stability deteriorates
Solution Approach 1:
The system implements a feedback mechanism where the ADC continuously monitors the VCO output frequency and feeds this information back to a control logic unit. The control logic then adjusts the VCO tuning voltage to maintain the desired rest frequency. This closed-loop feedback ensures rest frequency stability while using only standard integrated circuit components.
Solution Approach 2:
The patent replaces manual calibration mechanisms with an automated electronic control system. The control logic unit uses digital processing to detect frequency drift and automatically adjusts the VCO through electronic voltage control, eliminating the need for mechanical calibration procedures and reducing power consumption associated with manual intervention.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution maintains a stable rest frequency within ±0.8% of the nominal value across varying temperatures and process conditions, reducing power consumption and eliminating the need for periodic calibration.
Implementation Method 1
a Common-Mode Feedback (CMFB) circuit coupled to the output terminal of the first VCO and the output terminal of the second VCO, wherein the CMFB circuit is configured to generate, at an output terminal of the CMFB circuit, a bias voltage based on the first frequency modulated signal and the second frequency modulated signal, wherein the bias voltage is proportional to a rest frequency of the first VCO
Data Source
AI summary
A circuit includes: a micro-electromechanical system (MEMS) microphone configured to generate a voltage signal at an output terminal of the MEMS microphone in response to a sound signal; a voltage-controlled-oscillator (VCO) coupled to the output terminal of the MEMS microphone and configured to output, at an output terminal of the VCO, a frequency modulated signal having a frequency proportional to the voltage signal; a frequency-to-digital (FTD) converter coupled to the output terminal of the VCO and configured to convert the frequency modulated signal into a digital output signal proportional to the frequency; a frequency-to-voltage (FTV) conversion circuit coupled to the output terminal of the VCO and configured to generate a bias voltage at an output terminal of the FTV conversion circuit in accordance with the frequency modulated signal; and a resistor coupled between the output terminal of the MEMS microphone and the output terminal of the FTV conversion circuit.