Cascaded VCO-Based ADC for Nonlinearity-Corrected Wideband Conversion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing analog-to-digital converters (ADCs) face challenges in achieving high signal-to-noise ratio (SNR) and conversion bandwidth while maintaining low power consumption, particularly in low voltage and deep submicron processes, due to limitations in Delta-Sigma ADC methods and voltage-controlled oscillator (VCO) non-linearity.
Innovation Solution
A cascaded VCO-Based Delta-Sigma ADC is implemented, combining a VCO-based Delta-Sigma ADC loop with a forward path quantizer to cancel VCO quantizer nonlinearity, utilizing a digital filter with a noise transfer function matching the noise transfer function of the first digital signal to remove harmonic distortion and achieve improved SNR and bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If Delta-Sigma ADC methods are used, then signal-to-noise ratio is improved, but conversion bandwidth is limited
Solution Approach 1:
The ADC is divided into multiple stages: a first Delta-Sigma ADC stage that provides high SNR conversion, and a second stage that processes the residue signal. This segmentation allows each stage to operate optimally for its specific function, achieving both high SNR and wide bandwidth
Solution Approach 2:
The patent transitions from a single-dimensional Delta-Sigma approach to a multi-dimensional architecture by adding parallel processing paths and residue modulation techniques, enabling simultaneous achievement of high SNR and wide conversion bandwidth
2Speed
If VCO-based quantizer is used, then conversion bandwidth is improved, but non-linearity increases
Solution Approach 1:
The patent implements feedback mechanisms including a digital-to-analog converter that feeds back the quantized signal to the summing node, and uses the residue signal to correct non-linearities. This feedback loop compensates for VCO non-linearity while maintaining wide bandwidth
Solution Approach 2:
The system dynamically adjusts operating parameters including the VCO control voltage and quantizer thresholds based on the residue signal, thereby compensating for non-linearities and maintaining accuracy across the wide conversion bandwidth
3Measurement precision
If higher resolution conversion is achieved, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The high-resolution conversion is segmented into multiple stages, with each stage handling a portion of the resolution requirement. This allows power consumption to be distributed and optimized at each stage rather than requiring a single high-power converter
Solution Approach 2:
The residue signal from each stage is automatically reused and processed by subsequent stages, eliminating the need for additional high-power conversion operations and reducing overall power consumption while achieving high resolution
Data Source
AI summary
An analog-to-digital converter (“ADC”) includes an input terminal configured to receive an analog input signal. A first ADC circuit is coupled to the input terminal and includes a VCO. The first ADC circuit is configured to output a first digital signal in a frequency domain based on the analog input signal. The first digital signal includes an error component. A first DAC is configured to convert the first digital signal to an analog output signal. A first summation circuit is configured to receive the analog output signal, the analog input signal, and a loop filtered version of the analog input signal and extract the error component, and output a negative of the error component. A second ADC circuit is configured to convert the negative of the error component to a digital error signal. A second summation circuit is configured to receive the first digital signal and the digital error signal, and to output a digital output signal corresponding to the analog input at an output terminal.