VCO ADC Phase Reordering for Coarse-Fine Synchronization

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Solution Overview

Problem

VCO-based ADCs face errors due to desynchronization between coarse and fine phase estimations and direct sampling of phases, compromising their performance, particularly in low-cost digital microphones where power consumption and silicon area are critical factors.

Innovation Solution

The implementation of a multiphase ring oscillator-based ADC with a coarse counter using a maximum length sequence (MLS) generator and a fine counter with a Johnson counter, along with a metastability error correction circuit and thermometer-to-binary converter, to reorder phase signals and reduce asynchrony and metastability errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If direct sampling of phases is used in VCO-based ADCs, then the circuit complexity is reduced, but desynchronization errors between coarse and fine phase estimations increase, compromising ADC performance

Engineering Contradiction:
Improvecircuit complexityVSAvoidphase estimation accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by reordering phase signals before they are sampled by the counters. The phase signals are rearranged in advance so that consecutive phase signals have consecutive rising or falling edges, which ensures proper synchronization between coarse and fine counters before the sampling operation occurs, thereby preventing desynchronization errors.

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If coarse-fine quantization architecture is used with counter for integer phase progression, then the area and power consumption of quantization circuitry are reduced, but errors from desynchronization between coarse and fine phase estimations increase

Engineering Contradiction:
Improvepower consumptionVSAvoidphase estimation reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The reordering of phase signals is performed in advance before the coarse and fine counters operate. This preliminary arrangement ensures that when the counters sample the phase signals, they are properly synchronized, thereby maintaining reliable phase estimation while keeping the power consumption low through the coarse-fine quantization architecture.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If multiphase ring oscillator is used for VCO-ADC, then the resolution can be improved, but the silicon area increases, which is critical for low-cost digital microphones

Engineering Contradiction:
ImproveADC resolutionVSAvoidsilicon area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent applies segmentation by dividing the quantization process into coarse and fine stages. The coarse counter handles integer phase progression with larger steps, while the fine counter handles fractional phase progression with smaller steps. This segmentation allows achieving high resolution without requiring a multiphase ring oscillator with a large number of phases, thereby reducing the silicon area while maintaining ADC resolution.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP3772182B1Voltage controlled oscillator based analog-to-digital converter including a maximum length sequence generator
Publication Date: 2023.08.30 INFINEON TECHNOLOGIES AG
  • EP3772182B1 patent drawingFigure 1A
  • EP3772182B1 patent drawingFigure 1B
  • EP3772182B1 patent drawingFigure 2

AI summary

An analog-to-digital converter includes a ring oscillator having an input for receiving an analog signal, a coarse counter including a maximum length sequence generator having an input coupled to the output of the ring oscillator, a fine counter including a Johnson counter having an input coupled to the output of the ring oscillator, and a difference generator having a first input coupled to the output of the coarse counter, a second input coupled to the output of the fine counter, and an output for providing a digital signal corresponding to the analog signal.