Vector Atomic Request Tracking for Overlapping Scatter-Gather Writes

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Solution Overview

Problem

Conventional atomic operations on vectors induce significant overhead in processing resources due to the need for individual resolution of overlapping requests across multiple lanes, complicating memory access and increasing latency.

Innovation Solution

Implementing a hardware atomic request tracker that tracks the history of vector element requests and selectively collapses or overwrites requests based on prior operations, reducing unnecessary memory accesses and system resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional atomic operations are executed at the target in local memory, then atomicity is enforced, but significant overhead in processing resources is induced

Engineering Contradiction:
Improveatomicity enforcementVSAvoidprocessing resource efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces a store buffer as an intermediary component between the processing lanes and local memory. The store buffer temporarily holds store requests and resolves atomic operations by coordinating between multiple lanes before writing to local memory, thereby reducing the overhead on individual memory access operations while maintaining atomicity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent performs preliminary actions by having processing lanes issue store requests to the store buffer before actual memory access is needed. The store buffer pre-resolves atomic operations and prepares data for memory writing, allowing subsequent memory access to proceed without the full overhead of atomic operation resolution at each access point.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If atomic operations are performed for each vector element in memory, then atomicity is maintained, but the number of memory accesses increases

Engineering Contradiction:
Improveatomic operation correctnessVSAvoidmemory access latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges multiple store requests from different processing lanes into a single coordinated memory access through the store buffer. By combining overlapping store requests and resolving atomic operations at the buffer level rather than at memory, the system maintains atomicity while significantly reducing the total number of memory accesses and associated latency.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates intermediate copies of data in the store buffer before writing to local memory. These copies allow multiple processing lanes to operate on the same data without requiring simultaneous memory access, thereby maintaining atomicity while reducing memory access latency through buffered operation.

Inventive Principle:
Principle #26Copying

3Reliability

If overlapping requests across multiple lanes are resolved individually, then atomicity is enforced, but system complexity increases

Engineering Contradiction:
Improvesynchronization correctnessVSAvoidrequest resolution logic
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The store buffer serves as an intermediary that centralizes the complex logic for resolving overlapping atomic requests from multiple lanes. Instead of distributing complex resolution logic across multiple memory access points, the buffer consolidates this functionality in a single location, maintaining synchronization correctness while reducing overall system complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12536057B2Scatter-gather atomic optimization
Publication Date: 2026.01.27 ADVANCED MICRO DEVICES INC
  • US12536057B2 patent drawing
  • US12536057B2 patent drawing
  • US12536057B2 patent drawing

AI summary

In response to receiving a request for an atomic operation on a first element of a vector comprising a first address and a first data value, a processing system determines a request history associated with the first element. The processing system selectively alters the first request, based on the request history and the first data value.