Vector Data Access Ordering Circuitry for Interleaved Memory Operations
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Solution Overview
Problem
In data processing systems, vector operations often require multiple cycles to complete, and existing methods struggle to efficiently interleave data access instructions due to the need for extensive address comparisons to ensure safety, which is costly and inefficient, especially when dealing with large numbers of vector memory operations.
Innovation Solution
A vector data access unit with data access ordering circuitry that determines the next data access to perform based on the relative positions of elements within vector data access instructions, allowing limited interleaving of data accesses while ensuring safety constraints are met, thereby reducing the need for extensive address comparisons and enabling parallel execution of data access requests.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If extensive address comparisons are performed to ensure safe interleaving of data accesses, then reliability of data access ordering is improved, but device complexity and processing time increase
Solution Approach 1:
The patent extracts the safety assurance mechanism from extensive address comparisons to a simpler element position tracking system. Instead of comparing actual memory addresses, the system only tracks and compares the positions of elements within vector instructions, which are simpler integer values that can be processed with minimal circuitry while still guaranteeing safe interleaving.
Solution Approach 2:
The patent inverts the traditional approach by not comparing addresses directly to ensure safety, but rather by tracking element positions and using position-based ordering rules to implicitly ensure safety. This inversion simplifies the comparison operation from complex address matching to simple integer position comparison.
2Reliability
If extensive address comparisons are performed to ensure safe interleaving of data accesses, then reliability of data access ordering is improved, but processing time increases
Solution Approach 1:
The patent extracts the safety verification from time-consuming address comparisons to efficient element position tracking. By monitoring only the positional indices of elements within vector instructions and comparing these simple integers, the system maintains reliability while dramatically reducing the time required for safety verification.
Solution Approach 2:
The patent performs preliminary tracking of element positions as vector instructions are decoded and queued, before actual memory access occurs. This preliminary action maintains position information in ready-state registers, so that when interleaving decisions need to be made, the position comparisons can be performed instantly without adding latency to the critical memory access path.
3Reliability
If data accesses are issued in strict instruction stream order, then reliability of data access is improved, but productivity decreases due to inability to exploit parallelism
Solution Approach 1:
The patent introduces dynamic ordering based on element positions rather than static instruction stream order. The data access unit can dynamically adjust the issuance order of memory access requests by comparing element positions, allowing later instructions to overtake earlier ones when their element positions indicate it is safe to do so, thereby enabling parallelism while maintaining correctness.
Solution Approach 2:
The patent changes the ordering parameter from instruction issue time to element position within vector instructions. By using element position as the ordering criterion instead of temporal order, the system enables reordering of memory accesses to exploit parallelism while ensuring that accesses maintain their logical ordering relative to their element positions, preserving correctness.
4Productivity
If limited interleaving of data accesses is enabled, then productivity increases through parallel execution, but device complexity increases due to ordering circuitry
Solution Approach 1:
The patent extracts the ordering function from complex address comparison logic to simple element position tracking. The ordering circuitry only needs to monitor and compare the positional indices of elements within vector instructions, which are simple integers already available during instruction decoding, rather than performing complex address matching operations.
Solution Approach 2:
The element position tracking mechanism serves multiple functions: it enables safe interleaving decisions, determines issuance order of memory requests, and provides ordering information for multiple data access units. This universal position-based approach replaces multiple specialized circuits that would otherwise be needed for address comparison and ordering decisions.
Data Source
AI summary
A vector data access unit includes data access ordering circuitry, for issuing data access requests indicated by elements of earlier and a later vector instructions, one being a write instruction. An element indicating the next data access for each of the instructions is determined. The next data accesses for the earlier and the later instructions may be reordered. The next data access of the earlier instruction is selected if the position of the earlier instruction's next data element is less than or equal to the position of the later instruction's next data element minus a predetermined value. The next data access of the later instruction may be selected if the position of the earlier instruction's next data element is higher than the position of the later instruction's next data element minus a predetermined value. Thus data accesses from earlier and later instructions are partially interleaved.