In-Flight Vector Data Merging Circuitry

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Solution Overview

Problem

Wireless computing devices face resource constraints, particularly in battery life, due to limited power consumption and efficiency in processing operations, especially when merging and storing output vector data in vector processors, which can delay subsequent processing operations and underutilize computational components.

Innovation Solution

The implementation of merging circuitry in data flow paths between execution units and vector data memory allows for in-flight merging of output vector data, eliminating the need for post-processing and reducing data flow limitations, thereby enhancing processing efficiency by storing merged data directly in memory without additional steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If output vector data is stored to vector data memory before merging, then memory storage is simplified, but subsequent processing operations are delayed and computational components are underutilized

Engineering Contradiction:
Improvememory storage simplicityVSAvoidprocessing speed
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The merging operation is performed in-flight during the data transfer from execution units to vector data memory, rather than after storage. This preliminary action allows the merging to complete concurrently with the memory write operation, eliminating post-processing delays and keeping computational components fully utilized throughout the process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The merging circuitry operates continuously during the data flow from execution units to memory, ensuring that computational components remain fully utilized. The merging process does not interrupt or delay the memory storage operation, maintaining continuous productive action across all system components.

Inventive Principle:
Principle #20Continuity of useful action

2Device complexity

If merging is performed after data is stored in memory, then data flow paths are simpler, but processing efficiency is reduced due to additional post-processing steps

Engineering Contradiction:
Improvedata flow path complexityVSAvoidprocessing efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent combines the merging operation with the memory storage operation by placing merging circuitry in the data flow path between execution units and vector data memory. This consolidation allows both operations to occur simultaneously, maintaining simple data flow paths while eliminating separate post-processing steps that would reduce efficiency.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If merging circuitry is added to data flow paths, then in-flight merging is enabled, but device complexity increases

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidcircuitry complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The merging circuitry acts as an intermediary component in the data flow path between execution units and vector data memory. This intermediary performs the merging function during data transfer, enabling in-flight merging without requiring complex reorganization of the overall system architecture or additional post-processing infrastructure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9684509B2Vector processing engines (VPEs) employing merging circuitry in data flow paths between execution units and vector data memory to provide in-flight merging of output vector data stored to vector data memory, and related vector processing instructions, systems, and methods
Publication Date: 2017.06.20 QUALCOMM INC
  • US9684509B2 patent drawing
  • US9684509B2 patent drawing
  • US9684509B2 patent drawing

AI summary

Vector processing engines (VPEs) employing merging circuitry in data flow paths between execution units and vector data memory to provide in-flight merging of output vector data stored to vector data memory are disclosed. Related vector processing instructions, systems, and methods are also disclosed. Merging circuitry is provided in data flow paths between execution units and vector data memory in the VPE. The merging circuitry is configured to merge an output vector data sample set from execution units as a result of performing vector processing operations in-flight while the output vector data sample set is being provided over the output data flow paths from the execution units to the vector data memory to be stored. The merged output vector data sample set is stored in a merged form in the vector data memory without requiring additional post-processing steps, which may delay subsequent vector processing operations to be performed in execution units.