In-Flight Format Conversion Circuitry for Vector Processing Engines
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Wireless computing devices face power consumption issues due to the need for pre-processing, storage, and re-fetching of format-converted vector data samples, which delays execution units and increases power consumption.
Innovation Solution
In-flight format conversion circuitry is implemented in data flow paths between vector data memory and execution units, allowing for real-time conversion of input vector data without storage and re-fetching, thereby reducing power consumption and execution delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If format conversion is performed through pre-processing, storage, and re-fetching of vector data samples, then the data can be converted to the required format, but this process increases power consumption and creates execution delays
Solution Approach 1:
The patent implements format conversion circuitry that performs format conversion in advance within the data flow path, converting vector data samples from first format to second format before they reach the execution units. This preliminary conversion eliminates the need for subsequent re-fetching and re-conversion operations, thereby reducing power consumption while maintaining data accuracy
Solution Approach 2:
The patent introduces format conversion circuitry as an intermediary component between the memory system and execution units. This intermediary performs real-time format conversion of vector data samples as they flow through the system, avoiding the energy-intensive process of storing and re-fetching data for format conversion
2Measurement precision
If format-converted vector data samples are stored and re-fetched from memory, then the execution units can process the data, but this process delays the execution units and reduces processing efficiency
Solution Approach 1:
The format conversion circuitry performs format conversion in advance within the data flow path, converting vector data samples from first format to second format before they reach the execution units. This preliminary conversion eliminates the need for subsequent re-fetching and re-conversion operations, thereby reducing power consumption while maintaining data accuracy
Solution Approach 2:
The patent enables continuous data flow through the system by performing format conversion in-flight during data transmission rather than through discrete store-and-fetch operations. This continuous conversion process eliminates idle time for execution units and maintains steady processing throughput
3Productivity
If in-flight format conversion is implemented in data flow paths, then power consumption is reduced and execution delays are minimized, but additional format conversion circuitry is required
Solution Approach 1:
The format conversion circuitry is designed to handle multiple data formats and conversion scenarios within a single integrated structure. This universal circuitry can convert between different vector data formats (e.g., complex to real-imaginary, interleaved to non-interleaved) without requiring separate dedicated circuits for each conversion type, thereby managing complexity while maintaining high processing efficiency
Data Source
AI summary
Vector processing engines (VPEs) employing format conversion circuitry in data flow paths between vector data memory and execution units to provide in-flight format-converting of input vector data to execution units for vector processing operations are disclosed. Related vector processor systems and methods are also disclosed. Format conversion circuitry is provided in data flow paths between vector data memory and execution units in the VPE. The format conversion circuitry is configured to convert input vector data sample sets fetched from vector data memory in-flight while the input vector data sample sets are being provided over the data flow paths to the execution units to be processed. In this manner, format conversion of the input vector data sample sets does not require pre-processing, storage, and re-fetching from vector data memory, thereby reducing power consumption and not limiting efficiency of the data flow paths by format conversion pre-processing delays.


