Vector Processor On-the-Fly Format Conversion

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current vector processor systems require an intermediate memory for format conversion of data vectors, increasing processing time and power consumption due to the need for temporary storage during load/store operations.

Innovation Solution

Implementing on-the-fly format conversion within the load/store unit, eliminating the need for intermediate memory by performing format conversion and realignment during data transfer between the vector unit and memory, allowing direct processing and storage in suitable formats.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If format conversion is performed using intermediate memory, then data can be stored in suitable formats, but processing time increases and power consumption increases

Engineering Contradiction:
Improvedata format suitabilityVSAvoidprocessing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent performs format conversion during the load/store operations themselves, rather than as a separate preliminary step. The load/store unit is designed to perform format conversion on-the-fly as data is being transferred between memory and the vector unit, eliminating the need for separate format conversion steps and intermediate storage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent merges the format conversion function with the load/store unit, combining multiple operations (data transfer and format conversion) into a single integrated unit. This allows format conversion to occur simultaneously with data loading or storing, eliminating the need for separate intermediate memory storage and reducing overall processing time.

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If format conversion is performed using intermediate memory, then data can be stored in suitable formats, but power consumption increases

Engineering Contradiction:
Improvedata format suitabilityVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by stationary object

Solution Approach 1:

The patent merges the format conversion function with the load/store unit, combining multiple operations (data transfer and format conversion) into a single integrated unit. This allows format conversion to occur simultaneously with data loading or storing, eliminating the need for separate intermediate memory storage and reducing overall processing time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts the format conversion operation from the traditional memory storage process and integrates it directly into the load/store data path. By taking out the intermediate memory requirement and embedding format conversion capabilities within the load/store unit, the system eliminates unnecessary power consumption associated with intermediate memory access and management.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of operation

If intermediate memory is used for format conversion, then data transfer can be performed, but device complexity increases

Engineering Contradiction:
Improvedata transfer capabilityVSAvoidsystem complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent merges the format conversion function with the load/store unit, combining multiple operations (data transfer and format conversion) into a single integrated unit. This allows format conversion to occur simultaneously with data loading or storing, eliminating the need for separate intermediate memory storage and reducing overall processing time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts the format conversion operation from the traditional memory storage process and integrates it directly into the load/store data path. By taking out the intermediate memory requirement and embedding format conversion capabilities within the load/store unit, the system eliminates unnecessary power consumption associated with intermediate memory access and management.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10061581B2On-the-fly conversion during load/store operations in a vector processor
Publication Date: 2018.08.28 QUALCOMM INC
  • US10061581B2 patent drawing
  • US10061581B2 patent drawing
  • US10061581B2 patent drawing

AI summary

Systems and methods for performing on-the-fly format conversion on data vectors during load/store operations are described herein. In one embodiment, a method for loading a data vector from a memory into a vector unit comprises reading a plurality of samples from the memory, wherein the plurality of samples are packed in the memory. The method also comprises unpacking the samples to obtain a plurality of unpacked samples, performing format conversion on the unpacked samples in parallel, and sending at least a portion of the format-converted samples to the vector unit.