Vector Register System for Nonstandard Vector Storage
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Solution Overview
Problem
Current vector registers are limited to processing standard vectors of fixed lengths, leading to inefficiencies such as unused register bits and resource waste when handling nonstandard vectors, as they cannot effectively utilize all bits and often result in null bits between neighboring elements.
Innovation Solution
A method and system for vector reading-writing that converts nonstandard vectors into standard vectors of preset lengths and widths, allowing continuous storage without null bits, enabling flexible vector operations and efficient use of register bits by utilizing a vector-register controller, nonstandard-vector converting unit, and vector-register file to handle vectors of any width and length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If vector registers use fixed width and fixed standard lengths, then the register structure is simple and standard vectors can be processed, but nonstandard vectors cannot be processed and register bits cannot be effectively utilized
Solution Approach 1:
The patent implements dynamic vector length configuration where the vector register can adapt its effective length based on the specific vector being stored. The register structure includes configuration fields that allow it to dynamically adjust from fixed standard lengths to flexible nonstandard lengths, enabling processing of vectors of any size while maintaining a relatively simple base structure.
Solution Approach 2:
The patent changes the parameter of vector length from fixed to variable. By introducing configuration fields and control mechanisms, the register can change its effective length parameter to match the actual vector dimensions, thereby supporting both standard and nonstandard vectors without requiring completely different register structures.
2Quantity of substance
If standard vector registers are used to store nonstandard vectors, then the register can accommodate the data, but many register bits become null and cannot be utilized
Solution Approach 1:
The patent applies local quality by making the effective register region adaptable rather than uniformly fixed. The register structure allows the active storage region to be locally adjusted to match the actual vector size, so that only the necessary portion of the register is used for each specific vector, eliminating null bits while maintaining the ability to handle standard vectors efficiently.
3Ease of operation
If fixed width registers are used, then the register design is simple, but vectors of different widths cannot be stored continuously without null bits
Solution Approach 1:
The patent implements preliminary action by configuring the register's effective length before storing a vector. The control mechanism determines the appropriate vector length and sets up the register configuration in advance, allowing continuous storage without null bits. This preliminary configuration step simplifies the actual storage operation while requiring some control logic.
Data Source
AI summary
The present disclosure discloses a method for vector reading-writing, a vector-register system, a device and a medium. When a vector-writing instruction is obtained, by using a vector-register controller, a to-be-written-vector address space is converted into a to-be-written-vector-register-file bit address, and, for a nonstandard vector, by using a nonstandard-vector converting unit, after the nonstandard vector is converted into a to-be-written nonstandard vector, and, subsequently, writing is performed, to realize the saving of vector data of any format. When a vector-reading instruction is obtained, by using the vector-register controller, according to the to-be-read width and the to-be-read length, after the to-be-read-vector address space is converted into a to-be-read-vector-register-file bit address, and, subsequently, reading is performed, to realize the reading of vector data of any format.