Vertical 3D GaN MISFET Structure for High Power Efficiency
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Solution Overview
Problem
Conventional wide bandgap semiconductor power electronic devices with horizontal architectures face issues such as current slump, increased manufacturing costs, lower device performance, and larger device sizes due to surface traps and complexity in high power regimes.
Innovation Solution
The development of vertical transistors with three-dimensional (3D) structures, such as pillars or ridges, made from wide bandgap materials like GaN, which allow for independent tuning of turn-on voltage and breakdown voltage by adjusting the geometry of the 3D structures, reducing device size and enhancing performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If lateral GaN transistor architecture is used, then device structure is simple to manufacture, but device size increases and surface traps cause current slump in high power regimes
Solution Approach 1:
The patent transitions from a conventional lateral (2D) transistor architecture to a vertical (3D) transistor architecture. This dimensional change allows current to flow vertically through the device rather than laterally across the surface, eliminating the current slump problem caused by surface traps while maintaining manufacturing feasibility through standard semiconductor processing techniques adapted for vertical structures.
Solution Approach 2:
The patent inverts the conventional current flow direction by placing the source and drain regions vertically above and below the gate, rather than having them side-by-side in a lateral configuration. This inversion of the traditional device layout fundamentally changes the current path to avoid surface trap effects while preserving the essential transistor functionality.
2Strength
If lateral transistor size is increased to accommodate higher voltage, then breakdown voltage increases, but surface traps increase causing current slump
Solution Approach 1:
By transitioning to vertical architecture, the patent achieves high breakdown voltage through increased vertical distance between source and drain regions rather than increasing lateral device footprint. This allows the electric field to be distributed vertically through the bulk material, achieving high voltage capability without exposing larger surface areas to trap-induced current slump.
3Reliability
If vertical 3D structure is implemented, then device size is reduced and performance is enhanced, but manufacturing complexity increases
Solution Approach 1:
The vertical transistor structure is segmented into distinct functional regions (source region, drain region, gate region, isolation regions) that can be formed using standard semiconductor processing steps. This segmentation allows complex vertical functionality to be achieved through a series of simpler, well-established manufacturing operations rather than requiring entirely new complex processes.
Data Source
AI summary
According to one embodiment, an apparatus includes a substrate, and at least one three dimensional (3D) structure above the substrate. The substrate and the 3D structure each include a semiconductor material. The 3D structure also includes: a first region having a first conductivity type, and a second region coupled to a portion of at least one vertical sidewall of the 3D structure.