Vertical Capacitor Structure for High Capacitance in Small Footprints
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Solution Overview
Problem
Current capacitor technologies face challenges in increasing capacitance on a given substrate surface area due to limitations in forming deep and narrow cavities, which restricts the miniaturization of electronic components.
Innovation Solution
A vertical capacitor design featuring a stack of layers, including an alternation of insulating and conductive layers, extending over the substrate and walls, with the smallest dimension of each wall being smaller than 150 nm, allowing for increased capacitance by optimizing the geometric shape and substrate coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional capacitor designs are used, then manufacturing is simpler, but capacitance per substrate surface area is limited
Solution Approach 1:
The patent transitions from planar capacitor structures to three-dimensional vertical structures by forming deep cavities in the substrate and depositing alternating conductive and insulating layers that extend vertically. This dimensional change allows the capacitor to utilize the vertical space within the substrate, dramatically increasing the effective electrode surface area and thus the capacitance without occupying additional substrate footprint area.
Solution Approach 2:
The patent embeds the capacitor structure within the substrate by forming cavities and filling them with layered conductive and insulating materials. The capacitor is nested inside the substrate volume, allowing the substrate surface area to remain available for other components while the capacitance is generated within the three-dimensional space of the substrate itself.
2Quantity of substance
If deep and narrow cavities are formed, then capacitance increases, but manufacturing difficulty increases
Solution Approach 1:
The patent employs self-aligned manufacturing processes where the cavity formation and subsequent layer deposition are integrated in a way that the structure guides its own fabrication. The conformal deposition of layers automatically adapts to the cavity geometry, and the process steps are designed to be self-correcting, reducing the need for complex alignment and adjustment operations.
Solution Approach 2:
The patent utilizes oxidation processes to form the cavity structures and insulating layers, where chemical parameters (oxidation conditions, temperature, time) are precisely controlled to achieve the desired cavity depth and shape. By changing the oxidation parameters, the manufacturing process can produce consistent deep and narrow cavities without requiring mechanically complex fabrication steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances capacitance by increasing the interface area between insulating and conductive layers, overcoming the limitations of existing etch methods and enabling deeper and narrower cavities, thus improving capacitance on a given substrate surface area.
Implementation Method 1
the insulating layers are formed by oxidation on the substrate
Data Source
AI summary
A vertical capacitor includes a stack of layers conformally covering walls of a first material. The walls extend from a substrate made of a second material different from the first material.