Vertical Diode Barrier Region Prevents Boron Diffusion

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Solution Overview

Problem

As semiconductor devices integrate more densely, the reduction in width of silicon diodes leads to a decrease in boron concentration in P-type semiconductor regions, affecting electrical properties by increasing resistance and reducing on-current, particularly due to impurity diffusion issues across interlayer insulating layers.

Innovation Solution

A semiconductor device design incorporating a vertical diode structure with a barrier region comprising a first and second buffer dielectric material, and a barrier dielectric material, which prevents impurity diffusion from the semiconductor pattern into the interlayer insulating layer, maintaining electrical properties while enhancing integration density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the width of the silicon diode is reduced to increase integration density, then the integration density is improved, but the boron concentration in the P-type semiconductor region decreases due to impurity diffusion, causing resistance to increase and on-current to reduce

Engineering Contradiction:
Improveintegration densityVSAvoidelectrical properties
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A barrier region comprising a first buffer dielectric material and a barrier dielectric material is introduced between the P-type semiconductor region and the interlayer insulating layer. This intermediary barrier structure prevents boron impurities from diffusing into the insulating layer, thereby maintaining the electrical properties of the diode even when the diode width is reduced for higher integration density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The barrier region is constructed using composite dielectric materials with different properties: a first buffer dielectric material adjacent to the semiconductor region and a barrier dielectric material with higher impurity barrier characteristics. This composite structure effectively blocks impurity diffusion while maintaining device performance, enabling both high integration density and reliable electrical characteristics.

Inventive Principle:
Principle #40Composite materials

2Area of stationary object

If the width of the silicon diode is reduced, then the area occupied by the diode is reduced, but the resistance of the P-type semiconductor region increases due to boron diffusion loss

Engineering Contradiction:
Improvediode areaVSAvoidresistance control
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The barrier region acts as an intermediary structure that prevents boron diffusion from the P-type semiconductor region into the interlayer insulating layer. This allows the diode width to be reduced for smaller area occupation while maintaining the boron concentration and resistance characteristics through the protective barrier.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The barrier region is formed in advance before final device operation, creating a preventive structure that stops impurity diffusion before it can degrade the P-type region. This preliminary protective action ensures that even with reduced diode dimensions, the resistance remains controlled and predictable.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If the width of the silicon diode is reduced, then the integration density is enhanced, but the on-current of the diode is reduced due to decreased boron concentration

Engineering Contradiction:
Improveintegration densityVSAvoidon-current
Core Design Contradiction:
ProductivityVSPower

Solution Approach 1:

The barrier region serves as a protective intermediary that prevents boron impurities from diffusing into the interlayer insulating layer. This maintains the boron concentration in the P-type semiconductor region, thereby preserving the on-current characteristics even when the diode width is reduced to achieve higher integration density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

By introducing the barrier region, the impurity concentration parameter in the P-type semiconductor region is maintained at desired levels despite geometric scaling. This parameter preservation enables the diode to maintain its on-current performance while achieving smaller dimensions for improved integration density.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents impurity diffusion, maintaining electrical properties and enhancing integration density without degrading the semiconductor device's performance, thus addressing the challenge of reduced boron concentration and increased resistance.

Implementation Method 1

impurities (e.g., boron (B)) may easily diffuse from a P-type semiconductor region into an interlayer insulating layer disposed around the P-type semiconductor region

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS8987694B2Semiconductor devices having a vertical diode and methods of manufacturing the same
Publication Date: 2015.03.24 SAMSUNG ELECTRONICS CO LTD
  • US8987694B2 patent drawing
  • US8987694B2 patent drawing
  • US8987694B2 patent drawing

AI summary

Semiconductor devices, and methods of manufacturing the same, include a field region in a semiconductor substrate to define an active region. An interlayer insulating layer is on the semiconductor substrate. A semiconductor pattern is within a hole vertically extending through the interlayer insulating layer. The semiconductor pattern is in contact with the active region. A barrier region is between the semiconductor pattern and the interlayer insulating layer. The barrier region includes a first buffer dielectric material and a barrier dielectric material. The first buffer dielectric material is between the barrier dielectric material and the semiconductor pattern, and the barrier dielectric material is spaced apart from both the semiconductor pattern and the active region.