Vertical Diode Structure for ESD Protection in Thin Substrates
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Solution Overview
Problem
The downscaling of integrated circuit devices poses challenges in forming efficient p-n junctions due to the decreasing thickness and volume of silicon substrates, making it difficult to achieve effective electrostatic discharge (ESD) protection.
Innovation Solution
The integrated circuit device incorporates a diode structure with an upper semiconductor layer and a lower semiconductor layer, each doped with a specific conductivity type, and well regions within the substrate to form a vertical diode, ensuring a large p-n junction area even with thin substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the substrate thickness is decreased for downscaling, then the integration density is improved, but the ability to form efficient p-n junctions deteriorates
Solution Approach 1:
The patent transitions from a conventional planar diode structure to a vertical diode structure that extends through the substrate thickness. The first and second doped regions are positioned at opposite surfaces of the substrate, creating a vertical current path that utilizes the third dimension (substrate thickness) to achieve large junction area despite thin substrate constraints.
Solution Approach 2:
The substrate is divided into multiple segments along the vertical direction, with the first doped region at the first surface and the second doped region at the second surface. This segmentation allows each region to be independently formed and optimized, while collectively providing efficient ESD protection through the vertical junction structure.
2Volume of moving object
If the substrate thickness is decreased, then the device size is reduced, but the p-n junction area is insufficient
Solution Approach 1:
The invention resolves the area-volume contradiction by transitioning to a vertical junction configuration. The large junction area is achieved not by expanding lateral dimensions but by utilizing the vertical dimension through the substrate thickness, with doped regions extending from opposite surfaces to create an extensive vertical interface.
Solution Approach 2:
The patent employs a composite doped structure where the first doped region and second doped region with opposite conductivity types are positioned at opposite surfaces of the substrate. This composite arrangement creates a vertical p-n junction that provides both compact footprint and large effective junction area simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables efficient ESD protection by securing a large p-n junction area, effectively addressing the challenges posed by the thinning of silicon substrates in three-dimensional integrated circuit devices.
Implementation Method 1
an upper semiconductor layer disposed on the first surface of the substrate and including a first dopant of a first conductivity type; a lower semiconductor layer disposed on the second surface of the substrate and including a second dopant of a second conductivity type that is different from the first conductivity type
Data Source
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AI summary
An integrated circuit device includes: a substrate including a first surface and a second surface that is opposite to the first surface; and a diode structure including: an upper semiconductor layer disposed on the first surface of the substrate and including a first dopant of a first conductivity type; a lower semiconductor layer disposed on the second surface of the substrate and including a second dopant of a second conductivity type that is different from the first conductivity type; and a first well region provided in a portion of the substrate that is between the upper semiconductor layer and the lower semiconductor layer, wherein the first well region is in contact with the upper semiconductor layer or the lower semiconductor layer.