Vertical Three-Terminal Electrochemical Memory Cell for Neuromorphic Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current three-terminal electro-chemical memory cells face challenges in achieving high integration due to their two-terminal counterparts, such as phase-change and resistive random access memories, which have limitations in programming directionality and probabilistic programming, making them difficult to commercialize for neuromorphic computation.
Innovation Solution
A three-terminal electro-chemical memory cell with a vertical structure is developed, featuring a circumferential hole with sequentially stacked conductive electrode layers, an electrolyte or channel layer, and a gate electrode, along with an ion reservoir layer, enabling precise control over ion insertion and extraction for improved programming precision and integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If three-terminal electro-chemical memory cells are implemented with conventional planar structure, then programming precision can be controlled by ion insertion/extraction, but device integration density is reduced
Solution Approach 1:
The patent transitions from a conventional planar two-terminal structure to a vertical three-terminal structure by stacking the gate electrode, channel layer, and electrode layers in multiple dimensions. This vertical stacking enables precise control of ion insertion/extraction in the vertical direction while reducing the horizontal footprint, thereby achieving high programming precision with improved integration density.
2Device complexity
If phase-change memory or resistive random access memory is used, then device structure is simplified, but programming directionality and precision are compromised
Solution Approach 1:
The patent segments the memory device into distinct functional layers including a gate electrode layer, channel layer, and electrode layers, with each layer performing a specific function. The gate electrode controls ion insertion/extraction independently, enabling precise bidirectional programming while maintaining a relatively simple overall structure that can be manufactured using standard semiconductor processes.
3Manufacturing precision
If electro-chemical random access memory is implemented as a three-terminal device, then programming directionality is improved, but device integration and high-density array formation become difficult
Solution Approach 1:
The patent resolves the integration difficulty by stacking the three terminals (gate electrode, source electrode, drain electrode) vertically in multiple layers rather than arranging them horizontally. This vertical stacking reduces the horizontal area occupied by each memory cell, enabling high-density array formation while maintaining the three-terminal structure necessary for precise programming directionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration simplifies the device process, reduces area occupation, and enhances integration by allowing for a high-density array with efficient conductance changes, facilitating miniaturization and performance improvement in neuromorphic computation.
Implementation Method 1
precise control a direction and degree of programming by controlling the amount of ions inserted/extracted into the channel by the amount of current applied to the gate
Implementation Method 2
an electrolyte layer formed along an inner surface of the circumferential hole and connected to one end of each of the first and second conductive electrode layers
Data Source
AI summary
Disclosed is a three-terminal electro-chemical memory cell with a vertical structure for neuromorphic computation, including a circumferential hole, first and second conductive electrode layers sequentially stacked along an outer surface of the circumferential hole, an electrolyte layer formed along an inner surface of the circumferential hole and connected to one end of each of the first and second conductive electrode layers, and a gate electrode disposed parallel to the electrolyte layer in an inner surface direction of the circumferential hole.