Vertical Ferroelectric Memory Structure for Nonvolatile Data Retention
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Solution Overview
Problem
Existing semiconductor memory devices, particularly volatile memory devices like DRAM and SRAM, lose their stored data when power is interrupted, while nonvolatile memory devices like flash memory face challenges in integration density and efficiency.
Innovation Solution
A semiconductor device with a vertical structure comprising conductive pillars, channel structures, and interposing layers, utilizing ferroelectric materials for data storage that maintains polarization even without power, and a design that enhances integration density through channel separation patterns and conductive layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If volatile memory devices (DRAM, SRAM) are used for data storage, then data can be written and read efficiently, but data is lost when power is interrupted
Solution Approach 1:
The patent changes the fundamental parameter of memory retention by introducing ferroelectric materials that exhibit hysteresis effects. The ferroelectric layer's polarization state can maintain charge storage even after power interruption, transforming the memory device from volatile to non-volatile operation while preserving write/read efficiency
Solution Approach 2:
The patent employs a composite structure combining ferroelectric materials with conventional semiconductor layers. The ferroelectric layer is integrated between source and drain regions, creating a hybrid memory cell that merges the speed of conventional memory with the retention of non-volatile memory
2Reliability
If nonvolatile memory devices (flash memory) are used for data storage, then data is retained without power, but integration density and efficiency are limited
Solution Approach 1:
The patent transitions from planar flash memory architecture to a vertical three-dimensional structure. The ferroelectric layer is positioned vertically between source and drain contacts, enabling higher integration density by utilizing the vertical dimension for charge storage while maintaining non-volatile characteristics
Solution Approach 2:
The memory cell is segmented into distinct functional regions with the ferroelectric layer isolated between source and drain. This segmentation allows independent control of the ferroelectric material's polarization state through gate electrodes, enabling efficient programming and reading while maintaining compact cell structure
3Productivity
If vertical structure with conductive pillars and channel structures is implemented, then integration density is enhanced, but device complexity increases
Solution Approach 1:
The vertical structure serves multiple functions simultaneously: conductive pillars provide both electrical connection and mechanical support, channel structures define both current flow paths and spacing between cells, and the ferroelectric layer provides both charge storage and field confinement. This multi-functionality reduces the need for additional separate components
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves nonvolatile data storage with high integration density and efficient data retention, enabling reliable data preservation even without continuous power supply.
Implementation Method 1
utilizing ferroelectric materials for data storage that maintains polarization even without power
Data Source
AI summary
A semiconductor device including a stack including a plurality of electrodes stacked on a substrate, a conductive pillar penetrating a portion of the stack; a first channel layer surrounding the conductive pillar from a top down view; and a second channel layer surrounding the conductive pillar and spaced apart from the first channel layer in a vertical direction, a second channel layer surrounding the conductive pillar from the top down view and spaced apart from the first channel layer, in which the plurality of electrodes is connected to the first and second channel layers, the conductive pillar includes a plurality of conductive pillars spaced apart from each other in a first direction parallel to the upper surface of the substrate and a second direction, and the first and second channel layers are interposed between conductive pillars spaced apart from each other in the first and second directions.