Dual-Work-Function Vertical FET Gate for Lower GIDL
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Solution Overview
Problem
Gate-induced drain leakage (GIDL) in vertical field effect transistors (FETs) is exacerbated by high VDD voltages and lower gate voltages, particularly with thinner oxide thicknesses, leading to increased electric fields and performance issues.
Innovation Solution
A vertical FET design incorporating a gate with two different work function metals (WFMs), where the first WFM is positioned near the drain and the second WFM is between the first WFM and the source, each comprising multiple layers or single materials with varying thicknesses to modulate the electric field and threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high VDD voltage is applied to the drain with fixed gate voltage, then the electric field between gate and drain increases, but gate-induced drain leakage (GIDL) increases significantly
Solution Approach 1:
The gate is divided into two distinct regions with different work function metals: a first region adjacent to the drain with one work function, and a second region adjacent to the source with a different work function. This local differentiation allows the electric field to be modulated specifically at the gate-drain interface where GIDL occurs, without affecting the overall device operation. The first WFM region reduces the electric field peak that causes tunneling, while the second WFM region maintains proper threshold voltage control.
Solution Approach 2:
The invention changes the work function parameter of the gate material along its length. By using two different work function metals with distinct electronic properties, the electric field distribution and potential profile are modified. The first WFM has a work function optimized for reducing GIDL at the drain interface, while the second WFM has a work function optimized for source-side control, creating a gradual transition that reduces tunneling leakage.
2Productivity
If thinner oxide thickness is used, then the electric field enhancement is increased, but GIDL current increases due to higher tunneling probability
Solution Approach 1:
The dual WFM structure creates a local modification of the electric field at the gate-drain oxide interface. The first WFM region specifically addresses the interface where tunneling occurs by reducing the peak electric field, allowing thin oxide to maintain its high performance benefits without proportionally increasing GIDL. The work function difference creates a more favorable band alignment that reduces tunneling probability locally.
3Device complexity
If a single work function metal is used in the gate, then the structure is simpler, but the threshold voltage and electric field cannot be optimized for both drain and source regions
Solution Approach 1:
The gate structure incorporates two different work function metals in specific regions: the first WFM in the drain-adjacent region and the second WFM in the source-adjacent region. This allows independent optimization of the electric field at each interface - the first WFM reduces GIDL at the drain, while the second WFM controls the threshold voltage from the source side. The division creates localized functionality that a single uniform material cannot achieve.
Solution Approach 2:
The gate is constructed as a composite structure with two different metallic materials, each contributing different electronic properties. The first WFM and second WFM are deposited in sequence to form a multi-layered gate structure with distinct work functions. This composite approach combines the benefits of reduced GIDL from the first material with the threshold control capabilities of the second material, achieving dual optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces GIDL, enhancing the performance and reducing power consumption of the FET by controlling the electric field and threshold voltages across the gate.
Implementation Method 1
a gate comprising a first work function metal (WFM) and a second WFM such that the second WFM is disposed between the first WFM and the source
Data Source
AI summary
The embodiments herein describe a vertical field effect transistor (FET) with a gate that includes different work function metals (WFMs). Each WFM can be made up of one material (or one layer) or multiple materials forming multiple layers. In any case, the gate includes at least two different WFMs. For example, a first WFM may have a different material or layer than a second WFM in the gate, or one layer of the first WFM may have a different thickness than a corresponding layer in the second WFM. Having different WFMs in the gate can reduce the gate induced drain leakage (GIDL) in the FET.