Vertical Fin Devices for Integrated Circuit Manufacturing Efficiency
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Solution Overview
Problem
Manufacturing vertical field effect transistors (VFETs) and other non-vertical devices like diodes and silicon-controlled rectifiers (SCRs) negatively impact manufacturing efficiency and increase costs due to complexity and resource intensity.
Innovation Solution
The integration of a string of vertical devices, including vertical diodes and silicon-controlled rectifiers, within an integrated circuit (IC) structure, where devices are electrically connected in series to enhance manufacturing efficiency and density, utilizing a semiconductor substrate with N-wells and P-doped regions, and epitaxial semiconductor materials to form connected fin structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If vertical devices (VFETs, diodes, SCRs) are manufactured separately using different process flows, then device functionality is achieved, but manufacturing efficiency decreases and costs increase
Solution Approach 1:
The patent merges the manufacturing processes for VFETs, diodes, and SCRs into a single integrated process flow. All device types share common process steps including fin formation, doping sequences, and interconnect fabrication, eliminating the need for separate manufacturing lines and significantly improving manufacturing efficiency while reducing overall process complexity
Solution Approach 2:
The patent creates a universal manufacturing process that can produce multiple device types (VFETs, diodes, SCRs) using the same process steps and equipment. The process is designed to be multi-functional, allowing a single process flow to accommodate different device architectures and requirements, thereby reducing manufacturing costs and increasing productivity
2Quantity of substance
If device density is increased by stacking components vertically, then more devices fit on substrate, but manufacturing complexity and costs increase
Solution Approach 1:
The patent transitions from planar (2D) device layout to vertical (3D) stacking architecture. Devices are arranged in vertical strings with multiple active regions stacked along the vertical dimension, allowing significantly higher device density on the same substrate area. This dimensional change enables more devices to be packed into the same footprint without proportionally increasing manufacturing complexity
3Adaptability or versatility
If vertical devices are integrated with other non-vertical devices, then device functionality is enhanced, but manufacturing efficiency decreases
Solution Approach 1:
The patent combines vertical devices (VFETs, diodes, SCRs) with other non-vertical devices into a single integrated circuit structure that can be manufactured using one unified process flow. The integration is achieved through shared process steps and compatible material sequences, allowing diverse device functionalities to coexist without sacrificing manufacturing efficiency
Solution Approach 2:
The patent employs parameter changes in the doping sequences and processing conditions to accommodate different device types within the same manufacturing process. By adjusting doping concentrations, annealing temperatures, and etch parameters, the process can be tuned to produce various device structures while maintaining overall manufacturing efficiency and process integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves manufacturing efficiency, increases device density, and reduces costs by enabling the concurrent formation of VFETs and other vertical devices, optimizing the IC structure for better performance and production efficiency.
Implementation Method 1
an N-doped epitaxial semiconductor material immediately adjacent to the upper end of the semiconductor fin
Data Source
AI summary
Disclosed is an integrated circuit (IC) structure that incorporates a string of vertical devices. Embodiments of the IC structure include a string of two or more vertical diodes. Other embodiments include a vertical diode/silicon-controlled rectifier (SCR) string and, more particularly, a diode-triggered silicon-controlled rectifier (VDTSCR). In any case, each embodiment of the IC structure includes an N-well in a substrate and, within that N-well, a P-doped region and an N-doped region that abuts the P-doped region. The P-doped region can be anode of a vertical diode and can be electrically connected to the N-doped region (e.g., by a local interconnect or by contacts and metal wiring) such that the vertical diode is electrically connected to another vertical device (e.g., another vertical diode or a SCR with vertically-oriented features). Also disclosed is a manufacturing method that can be integrated with methods of manufacturing vertical field effect transistors (VFETs).