Vertical FinFET Capacitors for High Density IC Integration
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Solution Overview
Problem
Conventional planar metal-insulator-metal (MIM) capacitors limit the density of circuitry on a substrate due to their capacitance being proportional to lateral area, restricting the integration density of capacitors in integrated circuits.
Innovation Solution
The use of thin vertical semiconductor structures, manufactured using FinFET technology, which allows for increased capacitance by utilizing the height of the structures without significantly affecting lateral dimensions, enabling higher density capacitors to be integrated into substrates without increasing the overall height of the integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional planar MIM capacitor structures are used, then the capacitor can be manufactured with standard processes, but the capacitance density is limited due to dependence on lateral area only
Solution Approach 1:
The patent transitions from planar (2D) capacitor structures to vertical (3D) FinFET-based structures. By utilizing the vertical dimension through the fin height, the capacitor achieves increased capacitance density without proportionally increasing lateral footprint. The capacitance is now proportional to both lateral dimensions and vertical height, effectively adding a third dimension to the capacitor geometry.
2Quantity of substance
If vertical FinFET structures are used to increase capacitance density, then higher capacitor density is achieved, but the manufacturing process complexity increases
Solution Approach 1:
The FinFET vertical structures serve dual purposes: they function as active transistor channels in digital circuits and as capacitor dielectric structures in capacitive elements. This multi-functionality allows the same manufacturing processes that create high-performance transistors to also create high-density capacitors, reducing overall process complexity despite the vertical structure advancement.
Solution Approach 2:
The patent utilizes existing FinFET manufacturing parameters (fin height, fin pitch, oxide thickness) and adjusts them to optimize capacitor performance. By changing these parameters within the existing process framework rather than introducing entirely new processes, the patent achieves high capacitance density while managing manufacturing complexity.
3Quantity of substance
If the fin height is increased to improve capacitance, then the capacitor density increases, but the lateral dimensions and overall IC height are affected
Solution Approach 1:
The patent applies different qualities to different regions of the FinFET structure: the fin body provides vertical capacitance accumulation, while the top region is modified with electrode structures for electrical connection. This local differentiation allows the fin height to be optimized for capacitance without uniformly increasing all dimensional parameters of the device.
Data Source
AI summary
A vertical structure may be used as a high density capacitance for an integrated circuit. These thin vertical structures can be configured to operate as an insulator in a metal-insulator-metal (MIM) capacitor. The vertical structures may be manufactured using three-dimensional semiconductor manufacturing technology, such as FinFET (fin field effect transistor) technology and manufacturing processes. The capacitors based on thin vertical structures may be integrated with other circuitry that can utilize the thin vertical structures, such as FinFET transistors.