Vertical GaN Channel Structure for Higher Breakdown Voltage
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Solution Overview
Problem
Semiconductor devices made from Gallium Nitride (GaN) face challenges in achieving high breakdown voltage due to uneven electric field distribution, leading to device breakdown under reverse bias.
Innovation Solution
A semiconductor structure with a vertical channel layer and a gate electrode wrapping around the sidewall of the channel layer, along with a nitrogen surface and specific doping layers, enhances gate control and uniform electric field distribution, increasing breakdown voltage and reducing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a planar device structure is used, then the manufacturing process is simple, but the electric field distribution is uneven causing device breakdown under reverse bias
Solution Approach 1:
The patent transitions from a planar two-dimensional device structure to a three-dimensional vertical structure with the channel layer extending vertically from the substrate. The gate electrode wraps around the sidewall of the channel layer, creating a vertical field effect transistor configuration. This dimensional change enables more uniform electric field distribution throughout the device, preventing edge concentration effects that cause breakdown in planar devices while maintaining manufacturing feasibility through sequential layer deposition.
2Reliability
If the gate electrode wraps around the sidewall of the channel layer, then the gate control ability is improved, but the device complexity increases
Solution Approach 1:
The gate electrode is designed to wrap around and enclose the sidewall of the channel layer, creating a nested configuration where the gate surrounds the channel. This nested structure enhances gate control by placing the electric field-generating gate material in close proximity to the channel from multiple angles, improving carrier modulation. The complexity is managed by forming these nested structures through sequential deposition and patterning steps that build three-dimensional features from two-dimensional precursors.
3Reliability
If a vertical channel structure is used, then the breakdown voltage is increased, but the manufacturing precision requirements are higher
Solution Approach 1:
The patent employs precise control of deposition parameters including thickness, doping concentration, and compositional gradients in the vertical channel structure and surrounding layers. By optimizing these parameters during sequential layer formation, the design achieves uniform electric field distribution and high breakdown voltage. The vertical structure's enhanced field control compensates for the higher precision requirements, as the three-dimensional geometry naturally distributes stress and field lines more evenly compared to planar configurations.
Data Source
AI summary
Disclosed are a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate including a first region and a second region surrounding the first region; a patterned structure, a first N-type heavily-doped semiconductor layer, a channel layer, and a second N-type heavily-doped semiconductor layer arranged on the first region sequentially; a source electrode connected to the second N-type heavily-doped semiconductor layer; a drain electrode connected to the first N-type heavily-doped semiconductor layer; and a gate electrode wrapping around sidewall of the channel layer. The channel layer is a vertical channel structure wrapped by the gate electrode, which increases a gate control area, makes the electric field distribution more uniform, and greatly improves a control ability on the channel layer, so that a breakdown voltage is effectively increased, leakage current is reduced, dynamic characteristics are improved, and efficiency and linearity of the semiconductor structure are improved as well.