Vertical GaN FET Regrown Source Contacts
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Solution Overview
Problem
Current power transistor devices face challenges with slow switching speeds, high specific on-resistance, and high capacitance, particularly at high voltage applications, necessitating the development of devices with low capacitance, low threshold voltage, and low specific on-resistance while maintaining high breakdown voltage.
Innovation Solution
The development of vertical fin-based field effect transistor (FET) devices with a graded doping region and an epitaxially regrown gate layer, utilizing a ternary III-V compound on a binary III-V compound substrate, which reduces on-resistance and parasitic capacitance through a self-aligned source contact and graded doping region landing zone, enabling improved etch process control and current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional power transistor devices are used, then high breakdown voltage can be achieved, but switching speed is slow and specific on-resistance is high
Solution Approach 1:
The patent transitions from planar device architecture to vertical fin-based FET structure, adding the vertical dimension to the device geometry. This dimensional change enables simultaneous achievement of high breakdown voltage through vertical field control and fast switching through improved carrier transport pathways in the vertical channel.
Solution Approach 2:
The patent employs composite material structure combining ternary III-V compound (InGaN) gate layer on binary III-V compound (GaN) substrate. This composite structure enables optimization of both breakdown voltage through material bandgap engineering and switching speed through improved carrier mobility at the heterostructure interface.
2Reliability
If conventional power transistor devices are used, then high breakdown voltage can be achieved, but specific on-resistance is high
Solution Approach 1:
The patent implements graded doping region with spatially varying dopant concentration, creating local quality variations in the drift region. The doping concentration is highest at the substrate interface and decreases toward the surface, enabling localized field control that simultaneously achieves high breakdown voltage in the high-field region and low specific on-resistance in the low-field region.
3Reliability
If conventional power transistor devices are used, then high breakdown voltage can be achieved, but capacitance is high
Solution Approach 1:
The vertical fin structure reduces the lateral footprint of the device while maintaining the breakdown voltage through vertical field control. This dimensional change effectively reduces the capacitance by minimizing the overlapping area between charged regions, as capacitance is proportional to the overlapping area of adjacent conductive regions.
4Manufacturing precision
If self-aligned source contact with regrown III-nitride layer is implemented, then etch process control is improved, but device structure complexity increases
Solution Approach 1:
The patent performs preliminary epitaxial regrowth of the III-nitride source contact layer before final contact formation. This preliminary action creates a self-aligned structure where the regrown layer automatically defines the contact alignment, eliminating the need for separate alignment steps and simplifying the overall fabrication process despite the additional regrowth step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes the impact of etch depth variations, reduces spreading resistance, and controls drain-source ON resistance, threshold voltage, electric field, and leakage current, enhancing the performance of power transistor devices.
Implementation Method 1
epitaxially regrowing a III-nitride source contact portion coupled to each of the plurality of III-nitride fins
Data Source
AI summary
A method of forming an alignment contact includes: providing a III-nitride substrate; epitaxially growing a first III-nitride layer on the III-nitride substrate, wherein the first III-nitride layer is characterized by a first conductivity type; forming a plurality of III-nitride fins on the first III-nitride layer, wherein each the plurality of III-nitride fins is separated by one of a plurality of first recess regions, wherein the plurality of III-nitride fins are characterized by the first conductivity type; epitaxially regrowing a III-nitride source contact portion on each of the plurality of III-nitride fins; and forming a source contact structure on the III-nitride source contact portions.