Vertical Transfer Gate Pixel Layout for Higher Conversion Gain
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Solution Overview
Problem
Current image sensors face challenges in achieving high conversion gain, which is essential for precise image signal sensing, especially when the change in electric charge quantity in the floating diffusion region is small, due to limitations in pixel design that affect the capacitance and subsequent signal processing.
Innovation Solution
The design incorporates a semiconductor substrate with a vertical transfer gate spatially spaced apart from the floating diffusion region, utilizing a p-type and n-type impurity region structure to reduce capacitance, allowing for increased conversion gain and precise signal reading operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the vertical transfer gate is positioned close to the floating diffusion region, then the device complexity is reduced, but the conversion gain decreases due to increased capacitance
Solution Approach 1:
The patent introduces a third dimension (depth) by forming the vertical transfer gate that extends downward into the substrate, allowing spatial separation between the gate and floating diffusion region. This vertical dimensionality change enables reduced capacitance coupling while maintaining a compact planar footprint, thus improving conversion gain without significantly increasing device complexity.
Solution Approach 2:
The patent introduces a p-type impurity region as an intermediary element positioned between the vertical transfer gate and the n-type floating diffusion region. This intermediary region acts as a capacitor isolation structure that reduces parasitic capacitance coupling between the gate and floating diffusion, thereby enhancing conversion gain while maintaining structural simplicity.
2Reliability
If the capacitance of the floating diffusion region is increased, then the signal-to-noise ratio improves, but the conversion gain decreases
Solution Approach 1:
The patent extracts the parasitic capacitance source by spatially separating the vertical transfer gate from the floating diffusion region and introducing a p-type impurity region as a barrier. This extraction of harmful capacitance coupling allows the floating diffusion region to maintain its signal-to-noise ratio while achieving higher conversion gain through reduced parasitic effects.
Solution Approach 2:
The patent applies local quality differentiation by creating a p-type impurity region with specific doping characteristics positioned locally between the vertical transfer gate and floating diffusion region. This localized modification optimizes the electrical properties in the critical interaction zone, reducing parasitic capacitance while preserving the overall signal-to-noise ratio performance.
3Productivity
If the pixel size is reduced for fine pixels, then the productivity increases, but the conversion gain decreases due to limited space for capacitance optimization
Solution Approach 1:
The patent utilizes the vertical dimension by extending the transfer gate downward into the substrate and positioning the floating diffusion region at different depth levels. This three-dimensional arrangement allows fine pixels with high density while maintaining adequate electrical isolation and capacitance optimization space, thus preserving conversion gain despite reduced planar pixel size.
Solution Approach 2:
The patent segments the pixel structure into distinct vertical layers and regions, including the photoelectric conversion region, vertical transfer gate, p-type impurity region, and floating diffusion region at different depths. This segmentation allows independent optimization of each component's function and spacing, enabling high pixel density while maintaining conversion gain through controlled capacitance management.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables the image sensor to operate with high conversion gain, enabling precise sensing of image signals even with small changes in electric charge quantity, improving signal-to-noise ratio and allowing for photon counting capabilities.
Implementation Method 1
An image sensing device is a semiconductor device that is used to convert an optical signal to an electrical signal
Implementation Method 2
a second impurity region, which is provided between the vertical transfer gate and the floating diffusion region and is a p-type impurity region
Data Source
AI summary
An image sensor is provided. The image sensor includes: a semiconductor substrate including a first surface and a second surface, which are opposite to each other; a photoelectric conversion region in the semiconductor substrate; a vertical transfer gate, which extends into the semiconductor substrate from the first surface toward the photoelectric conversion region; a floating diffusion region, which is provided in the semiconductor substrate, is spaced apart from the vertical transfer gate, and is an n-type impurity region; and a second impurity region, which is provided between the vertical transfer gate and the floating diffusion region and is a p-type impurity region.