Vertical Gate Pixel Layout for Image Sensor Transmission
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Solution Overview
Problem
Current image sensors face challenges in achieving improved transmission characteristics due to the spacing between vertical gate structures, which affects the performance of pixel regions in converting optical information into electrical signals.
Innovation Solution
The image sensor design incorporates two vertical gate structures within each unit pixel, where the spacing between them decreases as they approach the floating diffusion region, optimizing the transmission characteristics by arranging the gate structures such that their width gradually decreases in a horizontal direction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If vertical gate structures are arranged with larger spacing, then manufacturing is easier and device reliability is improved, but transmission characteristics and integration density deteriorate
Solution Approach 1:
The patent applies local quality by varying the spacing between vertical gate structures at different locations within the pixel. Specifically, the spacing is reduced in regions where it most impacts transmission characteristics, while maintaining adequate spacing in other areas. This localized optimization allows improved transmission characteristics without uniformly increasing device complexity across the entire structure.
Solution Approach 2:
The patent transitions from a conventional two-dimensional planar gate structure to a three-dimensional vertical gate structure. This dimensional change allows the gates to extend into the depth of the substrate, improving transmission characteristics by providing a longer effective gate length without increasing the horizontal footprint, thereby maintaining integration density.
2Productivity
If pixel spacing is reduced to improve integration density, then productivity increases, but transmission characteristics and device performance worsen
Solution Approach 1:
By implementing vertical gate structures that extend into the substrate depth, the patent achieves improved transmission characteristics without requiring increased horizontal pixel spacing. This three-dimensional configuration allows pixels to be packed more densely in the planar direction while maintaining adequate gate-to-pixel overlap in the vertical direction, thus improving integration density without sacrificing transmission characteristics.
Solution Approach 2:
The vertical gate structures are nested within the pixel regions, with gates positioned to overlap with photoelectric conversion elements in the vertical direction. This nesting arrangement allows the gate structures to occupy the same horizontal footprint as the pixels while extending into the substrate, enabling reduced pixel spacing without compromising the transmission characteristics through maintained vertical overlap.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the transmission characteristics of the vertical gate structures, leading to improved performance in converting optical information into electrical signals, addressing the existing challenges in image sensor technology.
Implementation Method 1
The photodiode may convert incident light into an electrical signal
Data Source
AI summary
An image sensor is provided. The image sensor includes a substrate in which a first photoelectric conversion element is disposed, the substrate having a first surface and a second surface opposite the first surface, pixel separation patterns extending from the first surface of the substrate into the substrate, surrounding the first photoelectric conversion element, and defining a first pixel region in the substrate, a first vertical gate structure which extends in the first pixel region from the first surface of the substrate into the substrate and comprises a first portion disposed in the substrate and a second portion disposed on the first surface of the substrate, a second vertical gate structure which extends in the first pixel region from the first surface of the substrate into the substrate and comprises a first portion disposed in the substrate and a second portion disposed on the first surface of the substrate.