Vertical Gate Semiconductor Device Self-Aligned Source Formation

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Solution Overview

Problem

Conventional semiconductor devices with vertical gates face limitations in reducing gate electrode pitch due to the need for mask superposition shift, which restricts the decrease in on-resistance and increases in operational speed and power efficiency.

Innovation Solution

A method of manufacturing semiconductor devices with vertical gates that forms source regions without using lithography techniques, allowing for self-alignment and the formation of source regions adjacent to trenches with increasing impurity concentration, enabling a reduction in gate electrode pitch and on-resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the gate electrode pitch is reduced to increase unit cell density, then the on-resistance decreases and operational speed improves, but mask superposition shift causes manufacturing precision deterioration

Engineering Contradiction:
Improvegate electrode pitchVSAvoidsource region formation accuracy
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The insulating film on the gate electrode serves a dual function: as the gate dielectric and as a self-aligned mask for source region formation. The ion implantation automatically uses the insulating film's thickness variation to define the source region boundaries, eliminating the need for separate lithography masks and achieving self-alignment without requiring additional mask precision.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The insulating film is formed on the gate electrode structure before the source region formation step. This preliminary formation establishes the mask pattern that will automatically define the source region boundaries during ion implantation, ensuring proper alignment is achieved in advance of the actual source region creation.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the insulating film on the gate electrode protrudes from the substrate surface to enable vertical gate structure, then the gate control improves, but concave portions form causing voids in source electrodes

Engineering Contradiction:
Improvegate controlVSAvoidsurface flatness
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The protruding insulating film on the gate electrode is not treated as a defect to be eliminated but as a functional element that serves as a self-aligned mask. The ion implantation process automatically uses the film's thickness profile to define the source region, converting the shape irregularity into a useful alignment feature.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The insulating film thickness is intentionally varied across the gate electrode structure, being thicker at the edges and thinner at the center. This thickness parameter variation creates the self-aligned mask effect, where the film's physical dimensions directly determine the source region boundaries during ion implantation.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of semiconductor devices with reduced on-resistance and smaller gate electrode pitch without the need for mask superposition shift, enhancing operational speed and power efficiency while preventing the formation of parasitic bipolar transistors.

Implementation Method 1

forming a first insulating film that is formed in the concave portion and that has a portion in which a thickness increases with an increase in distance from an end of the trench

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

forming a first source region of the first conductivity type, which is disposed along the trench and which is adjacent to the trench and the top of the gate electrode, by introduction of purities through the first insulating film

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS9853126B2Semiconductor device with vertical gate and method of manufacturing the same
Publication Date: 2017.12.26 PANASONIC SEMICON SOLUTIONS CO LTD
  • US9853126B2 patent drawing
  • US9853126B2 patent drawing
  • US9853126B2 patent drawing

AI summary

A gate electrode is formed in a trench reaching a drain region so as to leave a concave portion on the top of the trench. A first insulating film is formed, which fills the concave portion and of which the thickness increases as the distance from an end of the trench increases on the substrate surface on both sides of the trench. First and second source regions are formed in a self-alignment manner by introduction of impurities through the first insulating film.