Vertical Interconnect Patterns in Multi-Layer ICs

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Solution Overview

Problem

The design of multi-layer integrated circuits is laborious due to constraints on placing vertical interconnects aligning with copper bond points, which limits the flexibility and efficiency of system designers in positioning these connections across different layers.

Innovation Solution

A method is introduced to generate sets of valid vertical interconnect positions by defining a candidate transformation origin and applying a predetermined transformation to the conductive bonding elements, determining validity, and selecting a valid transformation origin, allowing for the output of valid interconnect positions and facilitating the arrangement of logical modules across multiple layers with reduced design complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If vertical interconnects are positioned to align with copper bond points, then reliable electrical connections are achieved between layers, but the design process becomes laborious and time-consuming due to placement constraints

Engineering Contradiction:

Improveconnection reliabilityVSAvoiddesign time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent pre-calculates and stores valid vertical interconnect positions in a data structure before the actual placement process. This preliminary computation of valid positions based on copper bond point locations eliminates the need for time-consuming constraint checking during iterative placement, directly reducing design time while maintaining connection reliability

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent creates a copied representation of the copper bond point pattern and uses transformation operations (rotation, reflection, translation) to generate valid interconnect positions. This copying approach allows rapid generation of valid positions without repeatedly querying the original bond point geometry, significantly accelerating the placement process

Inventive Principle:

Principle #26Copying

2Reliability

If vertical interconnect positions are constrained to align with copper bond points, then proper electrical bonding is ensured, but design flexibility and efficiency are reduced

Engineering Contradiction:

Improvebonding integrityVSAvoiddesign flexibility

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent creates transformed copies of the copper bond point pattern through rotation, reflection, and translation operations. These transformed patterns represent valid interconnect positions that maintain bonding integrity while providing multiple possible locations, thereby increasing design flexibility without compromising reliability

Inventive Principle:

Principle #26Copying

Solution Approach 2:

The patent transforms the two-dimensional copper bond point pattern into multiple valid interconnect position patterns through geometric transformations. This dimensional transformation approach generates additional valid positions from the original bond point configuration, expanding design options while ensuring proper bonding alignment

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Manufacturing precision

If manual positioning of vertical interconnects is performed to satisfy copper bond point alignment, then connection validity is maintained, but the design process becomes complex and labor-intensive

Engineering Contradiction:

Improveinterconnect alignment precisionVSAvoiddesign process complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent implements a self-service mechanism where the system automatically generates and provides valid vertical interconnect positions through predefined transformations of copper bond point patterns. This automated position generation eliminates the need for manual constraint satisfaction efforts, reducing design complexity while maintaining precise alignment through algorithmic computation

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent pre-computes and stores valid interconnect positions in a data structure before the placement process begins. This preliminary generation of valid positions through transformation operations removes the complexity of real-time constraint checking during design iteration, while ensuring manufacturing precision through预先 calculated accurate positions

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS8381155B1Vertical interconnect patterns in multi-layer integrated circuits

Publication Date: 2013.02.19 REGENT OF THE UNIVESITY OF MICHIGAN THE

AI summary

A method of generating valid vertical interconnect positions for a multiple layer integrated circuit including multiple layers stacked vertically above one another and having a bonding interface between at least one pair of layers. The interface is formed by the coupling of a pair of conductive bond patterns formed on facing surfaces of the pair of layers. The method includes defining a candidate transformation origin, defining a sub-region which tessellates across the patterns, applying a predetermined transformation to the patterns at the bonding interface, determining the validity of the candidate transformation origin in dependence on coincidence of at least a subset of the patterns with the transformed patterns, selecting a valid transformation origin, and defining a set of valid vertical interconnect positions associated with the valid transformation origin at positions in the bonding interface where the original and transformed patterns coincided with each other.