Vertical LED Chip Stacking for Light Extraction and Redundancy
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Solution Overview
Problem
Existing light emitting devices using Group III-V nitride semiconductors face challenges in reliability and efficiency, particularly in the stacking and lamination of chip structures, which affect light extraction and overall performance.
Innovation Solution
A light emitting device structure is developed where multiple chip structures are vertically laminated and connected in parallel, each comprising a light emitting structure layer with conductive and reflective layers, and connection members, to enhance light extraction efficiency and reliability by ensuring operation even if one chip structure is defective.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If multiple chip structures are stacked vertically to improve light extraction efficiency, then light extraction efficiency is improved, but device complexity increases
Solution Approach 1:
The patent transitions from horizontal arrangement to vertical stacking of multiple chip structures, utilizing the third dimension (height) to increase light extraction efficiency without requiring additional horizontal space. This dimensional change allows multiple LEDs to be stacked vertically with connection members extending through intermediate layers, solving the light extraction problem while managing structural complexity through systematic vertical integration.
2Reliability
If multiple chip structures are connected in parallel to improve reliability, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent divides the light emitting device into multiple independent chip structures that can be connected in parallel. Each chip structure functions as an independent unit with its own light emitting elements, allowing the system to maintain operation even if one chip fails. This segmentation improves reliability through redundancy while managing complexity by creating modular, replaceable units.
Solution Approach 2:
The patent incorporates redundant chip structures that serve as backup units before failures occur. By pre-configuring multiple parallel paths for current flow and light emission, the system cushions against potential failures, ensuring continuous operation. This beforehand cushioning approach improves reliability by preparing backup mechanisms in advance rather than reacting to failures.
3Ease of manufacture
If vertical lamination of chip structures is implemented to simplify manufacturing, then manufacturing process is simplified, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs preliminary bonding layers and pre-formed connection members that are prepared in advance before final assembly. These preliminary structures provide alignment guides and positioning features that facilitate precise vertical stacking during manufacturing. By preparing alignment features beforehand, the patent simplifies the actual stacking process while ensuring the required manufacturing precision through pre-established reference structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves light extraction efficiency and reliability by allowing parallel operation of multiple chip structures, reducing the need for additional phosphors and enhancing light intensity, while also simplifying the manufacturing process through vertical lamination and connection of LED chips.
Implementation Method 1
a bonding layer between the second light emitting structure layer and the first reflective layer
Implementation Method 2
a bonding layer between the second light emitting structure layer and the first reflective layer
Implementation Method 3
a first light emitting structure layer comprising a first conductive type semiconductor layer, a second conductive type semiconductor layer under the first conductive type semiconductor layer, and a first active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer
Implementation Method 4
a first reflective layer under the first light emitting structure layer
Data Source
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AI summary
Provided are a light emitting device (100) and a light emitting device package having the same. The light emitting device includes a first light emitting structure layer (210) including a plurality of semiconductor layers, a first electrode on the first light emitting structure layer, a first insulation layer (108) under the first light emitting structure layer, a second light emitting structure layer (220) including a plurality of semiconductor layers under a first reflective layer (117) , a second reflective layer (135) under the second light emitting structure layer, a bonding layer (119,145) between the second light emitting structure layer and the first reflective layer, and a plurality of connection members (115,116,139,142,138) connecting the first light emitting structure layer to the second light emitting structure layer in parallel.