Vertical Non-Volatile Memory Alignment with Recessed Step Keys
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Solution Overview
Problem
Existing nonvolatile memory devices with vertical channel structures face challenges in maintaining alignment accuracy during the formation of channel holes, leading to reliability issues as the number of layers increases.
Innovation Solution
A vertical type nonvolatile memory device with a multi-stack structure that incorporates a step key and alignment vertical channel layer, where the alignment vertical channel layer is recessed relative to the first vertical channel layer, allowing for precise photolithographic alignment by maintaining the shape of the mold structure during planarization processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a vertical channel structure is used to increase memory cell integration, then storage capacity is improved, but alignment accuracy deteriorates as the number of layers increases
Solution Approach 1:
The patent applies preliminary action by forming a step key structure with an alignment vertical channel layer at a lower elevation before forming the main vertical channel layers. This pre-formed structure serves as an alignment reference that guides subsequent photolithographic processes, ensuring accurate alignment of channel holes even as the number of memory cell layers increases to 50 or more.
Solution Approach 2:
The step key structure acts as an intermediary element between the substrate and the multi-layer vertical channel structure. The alignment vertical channel layer within the step key provides a mediating reference feature that enables precise alignment of the photolithographic patterns for forming channel holes through the entire thickness of the stacked memory cell layers.
2Quantity of substance
If multiple vertical channel layers are stacked to increase capacity, then storage density is improved, but misalignment of vertical channel layers increases
Solution Approach 1:
The alignment vertical channel layer is formed in advance at a lower elevation to create a stable reference structure. This preliminary formation ensures that when subsequent vertical channel layers are formed through photolithographic processes, they can be accurately aligned to this reference, maintaining alignment reliability even with 50 or more stacked layers.
Solution Approach 2:
The patent introduces an additional dimensional aspect by creating the step key structure at a different elevation level (lower than the main vertical channel layers). This vertical dimensioning of the alignment reference provides a stable, accessible feature for photolithographic alignment without interfering with the functional vertical channel layers, thereby maintaining alignment reliability across multiple stacked layers.
3Measurement precision
If photolithographic alignment is performed on tall vertical structures, then alignment precision deteriorates due to shape distortion during planarization
Solution Approach 1:
The patent applies local quality by creating the alignment vertical channel layer at a locally lower elevation within the step key structure, distinct from the main vertical channel layers. This localized difference in elevation provides a stable, accessible alignment reference that is optimized for photolithographic measurement, while the main vertical channel layers maintain their full height for functional performance. The local quality of the alignment reference prevents shape distortion issues during planarization.
Data Source
AI summary
A vertical-type nonvolatile memory device has a multi-stack structure with reduced susceptibility to mis-alignment of a vertical channel layer. This nonvolatile memory device includes: (i) a main chip area including a cell area and an extension area arranged to have a stepped structure, with the cell area and the extension area formed in a multi-stack structure, and (ii) an outer chip area, which surrounds the main chip area and includes a step key therein. The main chip area includes a first layer on a substrate and a second layer on the first layer. A lower vertical channel layer is arranged in the first layer. The step key includes an alignment vertical channel layer, and a top surface of the alignment vertical channel layer is lower than a top surface of the lower vertical channel layer.