Vertical Memory Fin Fabrication Process Simplification

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Solution Overview

Problem

The complexity of fabricating vertical memory devices is increased due to the stacking of elements, leading to complications in the manufacturing process, and there is a need to simplify these processes while maintaining compatibility with existing technologies and operational performance.

Innovation Solution

A method involving the formation of semiconductor fin structures on a substrate with doped regions and a trench, where a second doped region is formed under the body regions and extends into the substrate, facilitating electrical connections between fin structures and contacts, and using a hard mask layer with materials like silicon oxide and nitride to pattern and implant dopants, simplifying the process and maintaining compatibility with existing processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If vertical memory device structure is adopted to reduce size and prevent short channel effect, then device size is reduced and short channel effect is prevented, but fabrication process complexity increases

Engineering Contradiction:
Improvedevice sizeVSAvoidfabrication process complexity
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent merges the formation of the second doped region with the existing fin structure fabrication process. By forming the second doped region in the substrate under the body regions during the same process steps used to create the fin structures, the method eliminates separate doping steps and simplifies the overall fabrication process while maintaining the vertical memory device architecture

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The fin structures serve multiple functions: they act as the vertical channel structures for memory operation and simultaneously provide a framework for forming the second doped region that extends into the substrate. This multi-functionality reduces the number of separate components and fabrication steps needed

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Length of moving object

If elements are stacked to form vertical structure, then channel length remains unchanged while size is reduced, but fabrication process becomes more complicated

Engineering Contradiction:
Improvechannel lengthVSAvoidfabrication process simplicity
Core Design Contradiction:
Length of moving objectVSEase of manufacture

Solution Approach 1:

The second doped region is formed preliminarily in the substrate before the fin structures are fully constructed. By pre-forming this doped region that extends into the substrate, subsequent fabrication steps can proceed without additional doping operations, simplifying the overall manufacturing process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The doping process is segmented into two distinct regions: the first doped region within the fin structures and the second doped region in the substrate. This segmentation allows each region to be optimized independently while being formed through integrated process steps

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method significantly simplifies the fabrication of vertical memory devices by facilitating connections between internal elements and maintaining operational performance and compatibility with existing processes, thereby addressing the complexity of vertical memory device manufacturing.

Implementation Method 1

a method of forming the second doped region includes performing an ion implantation process on the substrate with the patterned hard mask layers as masks to implant a dopant in the substrate and form the second doped region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

the fabricating method further includes performing a thermal annealing process to cause the dopant to form the second doped region

Methodology Applied
Scientific EffectThermal annealing: Annealing

Data Source

PatentUS9269583B1Method for fabricating memory device
Publication Date: 2016.02.23 MACRONIX INTERNATIONAL CO LTD
  • US9269583B1 patent drawing
  • US9269583B1 patent drawing
  • US9269583B1 patent drawing

AI summary

Provided is a method for fabricating a memory device, including the following steps. A plurality of semiconductor fin structures is formed on a substrate. Each semiconductor fin structure includes a first doped region and a body region on which the first doped region is disposed, and a trench is disposed between adjacent two semiconductor fin structures. A second doped region is formed in the substrate under the body regions of the semiconductor fin structures and the trenches. A plurality of first contacts are formed on the substrate. A plurality of second contacts are formed on the substrate. Each second contact is electrically connected with the corresponding first doped region.